diff options
65 files changed, 1297 insertions, 659 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt b/Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt new file mode 100644 index 000000000000..6c7e6c7302f5 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-dsp-keystone.txt @@ -0,0 +1,39 @@ +Keystone 2 DSP GPIO controller bindings + +HOST OS userland running on ARM can send interrupts to DSP cores using +the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core. +This is one of the component used by the IPC mechanism used on Keystone SOCs. + +For example TCI6638K2K SoC has 8 DSP GPIO controllers: + - 8 for C66x CorePacx CPUs 0-7 + +Keystone 2 DSP GPIO controller has specific features: +- each GPIO can be configured only as output pin; +- setting GPIO value to 1 causes IRQ generation on target DSP core; +- reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still + pending. + +Required Properties: +- compatible: should be "ti,keystone-dsp-gpio" +- ti,syscon-dev: phandle/offset pair. The phandle to syscon used to + access device state control registers and the offset of device's specific + registers within device state control registers range. +- gpio-controller: Marks the device node as a gpio controller. +- #gpio-cells: Should be 2. + +Please refer to gpio.txt in this directory for details of the common GPIO +bindings used by client devices. + +Example: + dspgpio0: keystone_dsp_gpio@02620240 { + compatible = "ti,keystone-dsp-gpio"; + ti,syscon-dev = <&devctrl 0x240>; + gpio-controller; + #gpio-cells = <2>; + }; + + dsp0: dsp0 { + compatible = "linux,rproc-user"; + ... + kick-gpio = <&dspgpio0 27>; + }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt new file mode 100644 index 000000000000..b9a42f294dd0 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt @@ -0,0 +1,39 @@ +* NXP PCA953x I2C GPIO multiplexer + +Required properties: + - compatible: Has to contain one of the following: + nxp,pca9505 + nxp,pca9534 + nxp,pca9535 + nxp,pca9536 + nxp,pca9537 + nxp,pca9538 + nxp,pca9539 + nxp,pca9554 + nxp,pca9555 + nxp,pca9556 + nxp,pca9557 + nxp,pca9574 + nxp,pca9575 + nxp,pca9698 + maxim,max7310 + maxim,max7312 + maxim,max7313 + maxim,max7315 + ti,pca6107 + ti,tca6408 + ti,tca6416 + ti,tca6424 + exar,xra1202 + +Example: + + + gpio@20 { + compatible = "nxp,pca9505"; + reg = <0x20>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pca9505>; + interrupt-parent = <&gpio3>; + interrupts = <23 IRQ_TYPE_LEVEL_LOW>; + }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene.txt new file mode 100644 index 000000000000..86dbb05e7758 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-xgene.txt @@ -0,0 +1,22 @@ +APM X-Gene SoC GPIO controller bindings + +This is a gpio controller that is part of the flash controller. +This gpio controller controls a total of 48 gpios. + +Required properties: +- compatible: "apm,xgene-gpio" for X-Gene GPIO controller +- reg: Physical base address and size of the controller's registers +- #gpio-cells: Should be two. + - first cell is the pin number + - second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low +- gpio-controller: Marks the device node as a GPIO controller. + +Example: + gpio0: gpio0@1701c000 { + compatible = "apm,xgene-gpio"; + reg = <0x0 0x1701c000 0x0 0x40>; + gpio-controller; + #gpio-cells = <2>; + }; diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt index 66416261e14d..b2afdb27adeb 100644 --- a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt +++ b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt @@ -19,7 +19,7 @@ Required properties: - gpio-controller : Marks the device node as a gpio controller. - #gpio-cells : Should be one. It is the pin number. -Example: +Example for a MMP platform: gpio: gpio@d4019000 { compatible = "marvell,mmp-gpio"; @@ -32,6 +32,19 @@ Example: #interrupt-cells = <1>; }; +Example for a PXA3xx platform: + + gpio: gpio@40e00000 { + compatible = "intel,pxa3xx-gpio"; + reg = <0x40e00000 0x10000>; + interrupt-names = "gpio0", "gpio1", "gpio_mux"; + interrupts = <8 9 10>; + gpio-controller; + #gpio-cells = <0x2>; + interrupt-controller; + #interrupt-cells = <0x2>; + }; + * Marvell Orion GPIO Controller Required properties: diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt index 18790c237977..31e0b5db55d8 100644 --- a/Documentation/gpio/driver.txt +++ b/Documentation/gpio/driver.txt @@ -124,7 +124,8 @@ symbol: * gpiochip_set_chained_irqchip(): sets up a chained irq handler for a gpio_chip from a parent IRQ and passes the struct gpio_chip* as handler data. (Notice handler data, since the irqchip data is likely used by the - parent irqchip!) This is for the chained type of chip. + parent irqchip!) This is for the chained type of chip. This is also used + to set up a nested irqchip if NULL is passed as handler. To use the helpers please keep the following in mind: @@ -178,7 +179,8 @@ does not help since it pins the module to the kernel forever (it calls try_module_get()). A GPIO driver can use the following functions instead to request and free descriptors without being pinned to the kernel forever. - int gpiochip_request_own_desc(struct gpio_desc *desc, const char *label) + struct gpio_desc *gpiochip_request_own_desc(struct gpio_desc *desc, + const char *label) void gpiochip_free_own_desc(struct gpio_desc *desc) diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c index a20fa80776d3..45f4c21e393c 100644 --- a/arch/arm/common/scoop.c +++ b/arch/arm/common/scoop.c @@ -243,18 +243,12 @@ err_ioremap: static int scoop_remove(struct platform_device *pdev) { struct scoop_dev *sdev = platform_get_drvdata(pdev); - int ret; if (!sdev) return -EINVAL; - if (sdev->gpio.base != -1) { - ret = gpiochip_remove(&sdev->gpio); - if (ret) { - dev_err(&pdev->dev, "Can't remove gpio chip: %d\n", ret); - return ret; - } - } + if (sdev->gpio.base != -1) + gpiochip_remove(&sdev->gpio); platform_set_drvdata(pdev, NULL); iounmap(sdev->base); diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index 9ff200ae1c9a..2791b8641df6 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c @@ -789,11 +789,11 @@ void __init txx9_iocled_init(unsigned long baseaddr, if (platform_device_add(pdev)) goto out_pdev; return; + out_pdev: platform_device_put(pdev); out_gpio: - if (gpiochip_remove(&iocled->chip)) - return; + gpiochip_remove(&iocled->chip); out_unmap: iounmap(iocled->mmioaddr); out_free: diff --git a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c index e238b6a55b15..73997027b085 100644 --- a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c +++ b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c @@ -141,7 +141,8 @@ static int mcu_gpiochip_add(struct mcu *mcu) static int mcu_gpiochip_remove(struct mcu *mcu) { - return gpiochip_remove(&mcu->gc); + gpiochip_remove(&mcu->gc); + return 0; } static int mcu_probe(struct i2c_client *client, const struct i2c_device_id *id) diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c index 3ea65e9b56e8..f035a7ac6456 100644 --- a/arch/sh/boards/mach-x3proto/gpio.c +++ b/arch/sh/boards/mach-x3proto/gpio.c @@ -128,10 +128,8 @@ int __init x3proto_gpio_setup(void) return 0; err_irq: - ret = gpiochip_remove(&x3proto_gpio_chip); - if (unlikely(ret)) - pr_err("Failed deregistering GPIO\n"); - + gpiochip_remove(&x3proto_gpio_chip); + ret = 0; err_gpio: synchronize_irq(ilsel); diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c index 57ce5fe65364..706b9ae0dcfb 100644 --- a/drivers/bcma/driver_gpio.c +++ b/drivers/bcma/driver_gpio.c @@ -255,5 +255,6 @@ int bcma_gpio_init(struct bcma_drv_cc *cc) int bcma_gpio_unregister(struct bcma_drv_cc *cc) { bcma_gpio_irq_domain_exit(cc); - return gpiochip_remove(&cc->gpio); + gpiochip_remove(&cc->gpio); + return 0; } diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 9de1515e5808..0959ca9b6b27 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -136,7 +136,6 @@ config GPIO_DWAPB tristate "Synopsys DesignWare APB GPIO driver" select GPIO_GENERIC select GENERIC_IRQ_CHIP - depends on OF_GPIO help Say Y or M here to build support for the Synopsys DesignWare APB GPIO block. @@ -334,6 +333,15 @@ config GPIO_TZ1090_PDC help Say yes here to support Toumaz Xenif TZ1090 PDC GPIOs. +config GPIO_XGENE + bool "APM X-Gene GPIO controller support" + depends on ARM64 && OF_GPIO + help + This driver is to support the GPIO block within the APM X-Gene SoC + platform's generic flash controller. The GPIO pins are muxed with + the generic flash controller's address and data pins. Say yes + here to enable the GFC GPIO functionality. + config GPIO_XILINX bool "Xilinx GPIO support" depends on PPC_OF || MICROBLAZE || ARCH_ZYNQ @@ -681,6 +689,7 @@ config GPIO_ADP5588_IRQ config GPIO_ADNP tristate "Avionic Design N-bit GPIO expander" depends on I2C && OF_GPIO + select GPIOLIB_IRQCHIP help This option enables support for N GPIOs found on Avionic Design I2C GPIO expanders. The register space will be extended by powers @@ -796,7 +805,6 @@ config GPIO_MAX7301 config GPIO_MCP23S08 tristate "Microchip MCP23xxx I/O expander" - depends on OF_GPIO depends on (SPI_MASTER && !I2C) || I2C help SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017 @@ -880,7 +888,7 @@ config GPIO_MSIC config GPIO_BCM_KONA bool "Broadcom Kona GPIO" - depends on OF_GPIO + depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST) help Turn on GPIO support for Broadcom "Kona" chips. diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 5d024e396622..e5d346cf3b6e 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -101,6 +101,7 @@ obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o obj-$(CONFIG_GPIO_WM831X) += gpio-wm831x.o obj-$(CONFIG_GPIO_WM8350) += gpio-wm8350.o obj-$(CONFIG_GPIO_WM8994) += gpio-wm8994.o +obj-$(CONFIG_GPIO_XGENE) += gpio-xgene.o obj-$(CONFIG_GPIO_XILINX) += gpio-xilinx.o obj-$(CONFIG_GPIO_XTENSA) += gpio-xtensa.o obj-$(CONFIG_GPIO_ZEVIO) += gpio-zevio.o diff --git a/drivers/gpio/gpio-adnp.c b/drivers/gpio/gpio-adnp.c index 416b2200d4f1..d3d0a90fe542 100644 --- a/drivers/gpio/gpio-adnp.c +++ b/drivers/gpio/gpio-adnp.c @@ -6,10 +6,9 @@ * published by the Free Software Foundation. */ -#include <linux/gpio.h> +#include <linux/gpio/driver.h> #include <linux/i2c.h> #include <linux/interrupt.h> -#include <linux/irqdomain.h> #include <linux/module.h> #include <linux/of_irq.h> #include <linux/seq_file.h> @@ -27,8 +26,6 @@ struct adnp { unsigned int reg_shift; struct mutex i2c_lock; - - struct irq_domain *domain; struct mutex irq_lock; u8 *irq_enable; @@ -253,6 +250,7 @@ static void adnp_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios) { struct gpio_chip *chip = &adnp->gpio; + int err; adnp->reg_shift = get_count_order(num_gpios) - 3; @@ -272,6 +270,10 @@ static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios) chip->of_node = chip->dev->of_node; chip->owner = THIS_MODULE; + err = gpiochip_add(chip); + if (err) + return err; + return 0; } @@ -326,7 +328,8 @@ static irqreturn_t adnp_irq(int irq, void *data) for_each_set_bit(bit, &pending, 8) { unsigned int child_irq; - child_irq = irq_find_mapping(adnp->domain, base + bit); + child_irq = irq_find_mapping(adnp->gpio.irqdomain, + base + bit); handle_nested_irq(child_irq); } } @@ -334,35 +337,32 @@ static irqreturn_t adnp_irq(int irq, void *data) return IRQ_HANDLED; } -static int adnp_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -{ - struct adnp *adnp = to_adnp(chip); - return irq_create_mapping(adnp->domain, offset); -} - -static void adnp_irq_mask(struct irq_data *data) +static void adnp_irq_mask(struct irq_data *d) { - struct adnp *adnp = irq_data_get_irq_chip_data(data); - unsigned int reg = data->hwirq >> adnp->reg_shift; - unsigned int pos = data->hwirq & 7; + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct adnp *adnp = to_adnp(gc); + unsigned int reg = d->hwirq >> adnp->reg_shift; + unsigned int pos = d->hwirq & 7; adnp->irq_enable[reg] &= ~BIT(pos); } -static void adnp_irq_unmask(struct irq_data *data) +static void adnp_irq_unmask(struct irq_data *d) { - struct adnp *adnp = irq_data_get_irq_chip_data(data); - unsigned int reg = data->hwirq >> adnp->reg_shift; - unsigned int pos = data->hwirq & 7; + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct adnp *adnp = to_adnp(gc); + unsigned int reg = d->hwirq >> adnp->reg_shift; + unsigned int pos = d->hwirq & 7; adnp->irq_enable[reg] |= BIT(pos); } -static int adnp_irq_set_type(struct irq_data *data, unsigned int type) +static int adnp_irq_set_type(struct irq_data *d, unsigned int type) { - struct adnp *adnp = irq_data_get_irq_chip_data(data); - unsigned int reg = data->hwirq >> adnp->reg_shift; - unsigned int pos = data->hwirq & 7; + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct adnp *adnp = to_adnp(gc); + unsigned int reg = d->hwirq >> adnp->reg_shift; + unsigned int pos = d->hwirq & 7; if (type & IRQ_TYPE_EDGE_RISING) adnp->irq_rise[reg] |= BIT(pos); @@ -387,16 +387,18 @@ static int adnp_irq_set_type(struct irq_data *data, unsigned int type) return 0; } -static void adnp_irq_bus_lock(struct irq_data *data) +static void adnp_irq_bus_lock(struct irq_data *d) { - struct adnp *adnp = irq_data_get_irq_chip_data(data); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct adnp *adnp = to_adnp(gc); mutex_lock(&adnp->irq_lock); } -static void adnp_irq_bus_unlock(struct irq_data *data) +static void adnp_irq_bus_unlock(struct irq_data *d) { - struct adnp *adnp = irq_data_get_irq_chip_data(data); + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct adnp *adnp = to_adnp(gc); unsigned int num_regs = 1 << adnp->reg_shift, i; mutex_lock(&adnp->i2c_lock); @@ -408,26 +410,6 @@ static void adnp_irq_bus_unlock(struct irq_data *data) mutex_unlock(&adnp->irq_lock); } -static int adnp_irq_reqres(struct irq_data *data) -{ - struct adnp *adnp = irq_data_get_irq_chip_data(data); - - if (gpio_lock_as_irq(&adnp->gpio, data->hwirq)) { - dev_err(adnp->gpio.dev, - "unable to lock HW IRQ %lu for IRQ\n", - data->hwirq); - return -EINVAL; - } - return 0; -} - -static void adnp_irq_relres(struct irq_data *data) -{ - struct adnp *adnp = irq_data_get_irq_chip_data(data); - - gpio_unlock_as_irq(&adnp->gpio, data->hwirq); -} - static struct irq_chip adnp_irq_chip = { .name = "gpio-adnp", .irq_mask = adnp_irq_mask, @@ -435,29 +417,6 @@ static struct irq_chip adnp_irq_chip = { .irq_set_type = adnp_irq_set_type, .irq_bus_lock = adnp_irq_bus_lock, .irq_bus_sync_unlock = adnp_irq_bus_unlock, - .irq_request_resources = adnp_irq_reqres, - .irq_release_resources = adnp_irq_relres, -}; - -static int adnp_irq_map(struct irq_domain *domain, unsigned int irq, - irq_hw_number_t hwirq) -{ - irq_set_chip_data(irq, domain->host_data); - irq_set_chip(irq, &adnp_irq_chip); - irq_set_nested_thread(irq, true); - -#ifdef CONFIG_ARM - set_irq_flags(irq, IRQF_VALID); -#else - irq_set_noprobe(irq); -#endif - - return 0; -} - -static const struct irq_domain_ops adnp_irq_domain_ops = { - .map = adnp_irq_map, - .xlate = irq_domain_xlate_twocell, }; static int adnp_irq_setup(struct adnp *adnp) @@ -503,35 +462,28 @@ static int adnp_irq_setup(struct adnp *adnp) adnp->irq_enable[i] = 0x00; } - adnp->domain = irq_domain_add_linear(chip->of_node, chip->ngpio, - &adnp_irq_domain_ops, adnp); - - err = request_threaded_irq(adnp->client->irq, NULL, adnp_irq, - IRQF_TRIGGER_RISING | IRQF_ONESHOT, - dev_name(chip->dev), adnp); + err = devm_request_threaded_irq(chip->dev, adnp->client->irq, + NULL, adnp_irq, + IRQF_TRIGGER_RISING | IRQF_ONESHOT, + dev_name(chip->dev), adnp); if (err != 0) { dev_err(chip->dev, "can't request IRQ#%d: %d\n", adnp->client->irq, err); return err; } |