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-rw-r--r--drivers/pinctrl/renesas/gpio.c2
-rw-r--r--drivers/pinctrl/renesas/pinctrl.c6
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pinctrl/renesas/gpio.c b/drivers/pinctrl/renesas/gpio.c
index 9c6e931ae766..ad06f5355d1e 100644
--- a/drivers/pinctrl/renesas/gpio.c
+++ b/drivers/pinctrl/renesas/gpio.c
@@ -328,7 +328,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
if (pfc->info->data_regs == NULL)
return 0;
- /* Find the memory window that contain the GPIO registers. Boards that
+ /* Find the memory window that contains the GPIO registers. Boards that
* register a separate GPIO device will not supply a memory resource
* that covers the data registers. In that case don't try to handle
* GPIOs.
diff --git a/drivers/pinctrl/renesas/pinctrl.c b/drivers/pinctrl/renesas/pinctrl.c
index f8d5fae66e86..8e54f9b662f3 100644
--- a/drivers/pinctrl/renesas/pinctrl.c
+++ b/drivers/pinctrl/renesas/pinctrl.c
@@ -399,7 +399,7 @@ static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
spin_lock_irqsave(&pfc->lock, flags);
if (!pfc->gpio) {
- /* If GPIOs are handled externally the pin mux type need to be
+ /* If GPIOs are handled externally the pin mux type needs to be
* set to GPIO here.
*/
const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
@@ -450,8 +450,8 @@ static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
unsigned int dir;
int ret;
- /* Check if the requested direction is supported by the pin. Not all SoC
- * provide pin config data, so perform the check conditionally.
+ /* Check if the requested direction is supported by the pin. Not all
+ * SoCs provide pin config data, so perform the check conditionally.
*/
if (pin->configs) {
dir = input ? SH_PFC_PIN_CFG_INPUT : SH_PFC_PIN_CFG_OUTPUT;