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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-12-08 14:46:41 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-12-18 15:59:17 +0100
commitf8d3bc10041914cceef4585a38cfdc071724b2a7 (patch)
tree3146eb5bdf0ac3681852d1719d07f0826eb8c6b7 /drivers
parenteb90826babfb13cf5cf240187d56cdfed9df5064 (diff)
eeprom: at25: Add DT support for EEPROMs with odd address bits
Certain EEPROMS have a size that is larger than the number of address bytes would allow, and store the MSB of the address in bit 3 of the instruction byte. This can be described in platform data using EE_INSTR_BIT3_IS_ADDR, or in DT using the obsolete legacy "at25,addr-mode" property. But currently there exists no non-deprecated way to describe this in DT. Hence extend the existing "address-width" DT property to allow specifying 9 address bits, and enable support for that in the driver. This has been tested with a Microchip 25LC040A. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/misc/eeprom/at25.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c
index 5afe4cd16569..9282ffd607ff 100644
--- a/drivers/misc/eeprom/at25.c
+++ b/drivers/misc/eeprom/at25.c
@@ -276,6 +276,9 @@ static int at25_fw_to_chip(struct device *dev, struct spi_eeprom *chip)
return -ENODEV;
}
switch (val) {
+ case 9:
+ chip->flags |= EE_INSTR_BIT3_IS_ADDR;
+ /* fall through */
case 8:
chip->flags |= EE_ADDR1;
break;