tty: move drivers/serial/ to drivers/tty/serial/

The serial drivers are really just tty drivers, so move them to
drivers/tty/ to make things a bit neater overall.

This is part of the tty/serial driver movement proceedure as proposed by
Arnd Bergmann and approved by everyone involved a number of months ago.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Rogier Wolff <R.E.Wolff@bitwizard.nl>
Cc: Michael H. Warfield <mhw@wittsend.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

1 files changed, 0 insertions, 2208 deletions

diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c
deleted file mode 100644
index 5b9cde79e4ea..000000000000
--- a/drivers/serial/pmac_zilog.c
+++ /dev/null
@@ -1,2208 +0,0 @@
-/*
- * linux/drivers/serial/pmac_zilog.c
- * 
- * Driver for PowerMac Z85c30 based ESCC cell found in the
- * "macio" ASICs of various PowerMac models
- * 
- * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
- *
- * Derived from drivers/macintosh/macserial.c by Paul Mackerras
- * and drivers/serial/sunzilog.c by David S. Miller
- *
- * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
- * adapted special tweaks needed for us. I don't think it's worth
- * merging back those though. The DMA code still has to get in
- * and once done, I expect that driver to remain fairly stable in
- * the long term, unless we change the driver model again...
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- * 2004-08-06 Harald Welte <laforge@gnumonks.org>
- *	- Enable BREAK interrupt
- *	- Add support for sysreq
- *
- * TODO:   - Add DMA support
- *         - Defer port shutdown to a few seconds after close
- *         - maybe put something right into uap->clk_divisor
- */
-
-#undef DEBUG
-#undef DEBUG_HARD
-#undef USE_CTRL_O_SYSRQ
-
-#include <linux/module.h>
-#include <linux/tty.h>
-
-#include <linux/tty_flip.h>
-#include <linux/major.h>
-#include <linux/string.h>
-#include <linux/fcntl.h>
-#include <linux/mm.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/console.h>
-#include <linux/adb.h>
-#include <linux/pmu.h>
-#include <linux/bitops.h>
-#include <linux/sysrq.h>
-#include <linux/mutex.h>
-#include <asm/sections.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-
-#ifdef CONFIG_PPC_PMAC
-#include <asm/prom.h>
-#include <asm/machdep.h>
-#include <asm/pmac_feature.h>
-#include <asm/dbdma.h>
-#include <asm/macio.h>
-#else
-#include <linux/platform_device.h>
-#define of_machine_is_compatible(x) (0)
-#endif
-
-#if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-#define SUPPORT_SYSRQ
-#endif
-
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-
-#include "pmac_zilog.h"
-
-/* Not yet implemented */
-#undef HAS_DBDMA
-
-static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
-MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
-MODULE_DESCRIPTION("Driver for the Mac and PowerMac serial ports.");
-MODULE_LICENSE("GPL");
-
-#ifdef CONFIG_SERIAL_PMACZILOG_TTYS
-#define PMACZILOG_MAJOR		TTY_MAJOR
-#define PMACZILOG_MINOR		64
-#define PMACZILOG_NAME		"ttyS"
-#else
-#define PMACZILOG_MAJOR		204
-#define PMACZILOG_MINOR		192
-#define PMACZILOG_NAME		"ttyPZ"
-#endif
-
-
-/*
- * For the sake of early serial console, we can do a pre-probe
- * (optional) of the ports at rather early boot time.
- */
-static struct uart_pmac_port	pmz_ports[MAX_ZS_PORTS];
-static int			pmz_ports_count;
-static DEFINE_MUTEX(pmz_irq_mutex);
-
-static struct uart_driver pmz_uart_reg = {
-	.owner		=	THIS_MODULE,
-	.driver_name	=	PMACZILOG_NAME,
-	.dev_name	=	PMACZILOG_NAME,
-	.major		=	PMACZILOG_MAJOR,
-	.minor		=	PMACZILOG_MINOR,
-};
-
-
-/* 
- * Load all registers to reprogram the port
- * This function must only be called when the TX is not busy.  The UART
- * port lock must be held and local interrupts disabled.
- */
-static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
-{
-	int i;
-
-	if (ZS_IS_ASLEEP(uap))
-		return;
-
-	/* Let pending transmits finish.  */
-	for (i = 0; i < 1000; i++) {
-		unsigned char stat = read_zsreg(uap, R1);
-		if (stat & ALL_SNT)
-			break;
-		udelay(100);
-	}
-
-	ZS_CLEARERR(uap);
-	zssync(uap);
-	ZS_CLEARFIFO(uap);
-	zssync(uap);
-	ZS_CLEARERR(uap);
-
-	/* Disable all interrupts.  */
-	write_zsreg(uap, R1,
-		    regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
-
-	/* Set parity, sync config, stop bits, and clock divisor.  */
-	write_zsreg(uap, R4, regs[R4]);
-
-	/* Set misc. TX/RX control bits.  */
-	write_zsreg(uap, R10, regs[R10]);
-
-	/* Set TX/RX controls sans the enable bits.  */
-	write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
-	write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
-
-	/* now set R7 "prime" on ESCC */
-	write_zsreg(uap, R15, regs[R15] | EN85C30);
-	write_zsreg(uap, R7, regs[R7P]);
-
-	/* make sure we use R7 "non-prime" on ESCC */
-	write_zsreg(uap, R15, regs[R15] & ~EN85C30);
-
-	/* Synchronous mode config.  */
-	write_zsreg(uap, R6, regs[R6]);
-	write_zsreg(uap, R7, regs[R7]);
-
-	/* Disable baud generator.  */
-	write_zsreg(uap, R14, regs[R14] & ~BRENAB);
-
-	/* Clock mode control.  */
-	write_zsreg(uap, R11, regs[R11]);
-
-	/* Lower and upper byte of baud rate generator divisor.  */
-	write_zsreg(uap, R12, regs[R12]);
-	write_zsreg(uap, R13, regs[R13]);
-	
-	/* Now rewrite R14, with BRENAB (if set).  */
-	write_zsreg(uap, R14, regs[R14]);
-
-	/* Reset external status interrupts.  */
-	write_zsreg(uap, R0, RES_EXT_INT);
-	write_zsreg(uap, R0, RES_EXT_INT);
-
-	/* Rewrite R3/R5, this time without enables masked.  */
-	write_zsreg(uap, R3, regs[R3]);
-	write_zsreg(uap, R5, regs[R5]);
-
-	/* Rewrite R1, this time without IRQ enabled masked.  */
-	write_zsreg(uap, R1, regs[R1]);
-
-	/* Enable interrupts */
-	write_zsreg(uap, R9, regs[R9]);
-}
-
-/* 
- * We do like sunzilog to avoid disrupting pending Tx
- * Reprogram the Zilog channel HW registers with the copies found in the
- * software state struct.  If the transmitter is busy, we defer this update
- * until the next TX complete interrupt.  Else, we do it right now.
- *
- * The UART port lock must be held and local interrupts disabled.
- */
-static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
-{
-	if (!ZS_REGS_HELD(uap)) {
-		if (ZS_TX_ACTIVE(uap)) {
-			uap->flags |= PMACZILOG_FLAG_REGS_HELD;
-		} else {
-			pmz_debug("pmz: maybe_update_regs: updating\n");
-			pmz_load_zsregs(uap, uap->curregs);
-		}
-	}
-}
-
-static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
-{
-	struct tty_struct *tty = NULL;
-	unsigned char ch, r1, drop, error, flag;
-	int loops = 0;
-
-	/* The interrupt can be enabled when the port isn't open, typically
-	 * that happens when using one port is open and the other closed (stale
-	 * interrupt) or when one port is used as a console.
-	 */
-	if (!ZS_IS_OPEN(uap)) {
-		pmz_debug("pmz: draining input\n");
-		/* Port is closed, drain input data */
-		for (;;) {
-			if ((++loops) > 1000)
-				goto flood;
-			(void)read_zsreg(uap, R1);
-			write_zsreg(uap, R0, ERR_RES);
-			(void)read_zsdata(uap);
-			ch = read_zsreg(uap, R0);
-			if (!(ch & Rx_CH_AV))
-				break;
-		}
-		return NULL;
-	}
-
-	/* Sanity check, make sure the old bug is no longer happening */
-	if (uap->port.state == NULL || uap->port.state->port.tty == NULL) {
-		WARN_ON(1);
-		(void)read_zsdata(uap);
-		return NULL;
-	}
-	tty = uap->port.state->port.tty;
-
-	while (1) {
-		error = 0;
-		drop = 0;
-
-		r1 = read_zsreg(uap, R1);
-		ch = read_zsdata(uap);
-
-		if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
-			write_zsreg(uap, R0, ERR_RES);
-			zssync(uap);
-		}
-
-		ch &= uap->parity_mask;
-		if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) {
-			uap->flags &= ~PMACZILOG_FLAG_BREAK;
-		}
-
-#if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE)
-#ifdef USE_CTRL_O_SYSRQ
-		/* Handle the SysRq ^O Hack */
-		if (ch == '\x0f') {
-			uap->port.sysrq = jiffies + HZ*5;
-			goto next_char;
-		}
-#endif /* USE_CTRL_O_SYSRQ */
-		if (uap->port.sysrq) {
-			int swallow;
-			spin_unlock(&uap->port.lock);
-			swallow = uart_handle_sysrq_char(&uap->port, ch);
-			spin_lock(&uap->port.lock);
-			if (swallow)
-				goto next_char;
-		}
-#endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
-
-		/* A real serial line, record the character and status.  */
-		if (drop)
-			goto next_char;
-
-		flag = TTY_NORMAL;
-		uap->port.icount.rx++;
-
-		if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | BRK_ABRT)) {
-			error = 1;
-			if (r1 & BRK_ABRT) {
-				pmz_debug("pmz: got break !\n");
-				r1 &= ~(PAR_ERR | CRC_ERR);
-				uap->port.icount.brk++;
-				if (uart_handle_break(&uap->port))
-					goto next_char;
-			}
-			else if (r1 & PAR_ERR)
-				uap->port.icount.parity++;
-			else if (r1 & CRC_ERR)
-				uap->port.icount.frame++;
-			if (r1 & Rx_OVR)
-				uap->port.icount.overrun++;
-			r1 &= uap->port.read_status_mask;
-			if (r1 & BRK_ABRT)
-				flag = TTY_BREAK;
-			else if (r1 & PAR_ERR)
-				flag = TTY_PARITY;
-			else if (r1 & CRC_ERR)
-				flag = TTY_FRAME;
-		}
-
-		if (uap->port.ignore_status_mask == 0xff ||
-		    (r1 & uap->port.ignore_status_mask) == 0) {
-			tty_insert_flip_char(tty, ch, flag);
-		}
-		if (r1 & Rx_OVR)
-			tty_insert_flip_char(tty, 0, TTY_OVERRUN);
-	next_char:
-		/* We can get stuck in an infinite loop getting char 0 when the
-		 * line is in a wrong HW state, we break that here.
-		 * When that happens, I disable the receive side of the driver.
-		 * Note that what I've been experiencing is a real irq loop where
-		 * I'm getting flooded regardless of the actual port speed.
-		 * Something stange is going on with the HW
-		 */
-		if ((++loops) > 1000)
-			goto flood;
-		ch = read_zsreg(uap, R0);
-		if (!(ch & Rx_CH_AV))
-			break;
-	}
-
-	return tty;
- flood:
-	uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
-	write_zsreg(uap, R1, uap->curregs[R1]);
-	zssync(uap);
-	pmz_error("pmz: rx irq flood !\n");
-	return tty;
-}
-
-static void pmz_status_handle(struct uart_pmac_port *uap)
-{
-	unsigned char status;
-
-	status = read_zsreg(uap, R0);
-	write_zsreg(uap, R0, RES_EXT_INT);
-	zssync(uap);
-
-	if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) {
-		if (status & SYNC_HUNT)
-			uap->port.icount.dsr++;
-
-		/* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
-		 * But it does not tell us which bit has changed, we have to keep
-		 * track of this ourselves.
-		 * The CTS input is inverted for some reason.  -- paulus
-		 */
-		if ((status ^ uap->prev_status) & DCD)
-			uart_handle_dcd_change(&uap->port,
-					       (status & DCD));
-		if ((status ^ uap->prev_status) & CTS)
-			uart_handle_cts_change(&uap->port,
-					       !(status & CTS));
-
-		wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
-	}
-
-	if (status & BRK_ABRT)
-		uap->flags |= PMACZILOG_FLAG_BREAK;
-
-	uap->prev_status = status;
-}
-
-static void pmz_transmit_chars(struct uart_pmac_port *uap)
-{
-	struct circ_buf *xmit;
-
-	if (ZS_IS_ASLEEP(uap))
-		return;
-	if (ZS_IS_CONS(uap)) {
-		unsigned char status = read_zsreg(uap, R0);
-
-		/* TX still busy?  Just wait for the next TX done interrupt.
-		 *
-		 * It can occur because of how we do serial console writes.  It would
-		 * be nice to transmit console writes just like we normally would for
-		 * a TTY line. (ie. buffered and TX interrupt driven).  That is not
-		 * easy because console writes cannot sleep.  One solution might be
-		 * to poll on enough port->xmit space becomming free.  -DaveM
-		 */
-		if (!(status & Tx_BUF_EMP))
-			return;
-	}
-
-	uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE;
-
-	if (ZS_REGS_HELD(uap)) {
-		pmz_load_zsregs(uap, uap->curregs);
-		uap->flags &= ~PMACZILOG_FLAG_REGS_HELD;
-	}
-
-	if (ZS_TX_STOPPED(uap)) {
-		uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
-		goto ack_tx_int;
-	}
-
-	/* Under some circumstances, we see interrupts reported for
-	 * a closed channel. The interrupt mask in R1 is clear, but
-	 * R3 still signals the interrupts and we see them when taking
-	 * an interrupt for the other channel (this could be a qemu
-	 * bug but since the ESCC doc doesn't specify precsiely whether
-	 * R3 interrup status bits are masked by R1 interrupt enable
-	 * bits, better safe than sorry). --BenH.
-	 */
-	if (!ZS_IS_OPEN(uap))
-		goto ack_tx_int;
-
-	if (uap->port.x_char) {
-		uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
-		write_zsdata(uap, uap->port.x_char);
-		zssync(uap);
-		uap->port.icount.tx++;
-		uap->port.x_char = 0;
-		return;
-	}
-
-	if (uap->port.state == NULL)
-		goto ack_tx_int;
-	xmit = &uap->port.state->xmit;
-	if (uart_circ_empty(xmit)) {
-		uart_write_wakeup(&uap->port);
-		goto ack_tx_int;
-	}
-	if (uart_tx_stopped(&uap->port))
-		goto ack_tx_int;
-
-	uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
-	write_zsdata(uap, xmit->buf[xmit->tail]);
-	zssync(uap);
-
-	xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
-	uap->port.icount.tx++;
-
-	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
-		uart_write_wakeup(&uap->port);
-
-	return;
-
-ack_tx_int:
-	write_zsreg(uap, R0, RES_Tx_P);
-	zssync(uap);
-}
-
-/* Hrm... we register that twice, fixme later.... */
-static irqreturn_t pmz_interrupt(int irq, void *dev_id)
-{
-	struct uart_pmac_port *uap = dev_id;
-	struct uart_pmac_port *uap_a;
-	struct uart_pmac_port *uap_b;
-	int rc = IRQ_NONE;
-	struct tty_struct *tty;
-	u8 r3;
-
-	uap_a = pmz_get_port_A(uap);
-	uap_b = uap_a->mate;
-
-	spin_lock(&uap_a->port.lock);
-	r3 = read_zsreg(uap_a, R3);
-
-#ifdef DEBUG_HARD
-	pmz_debug("irq, r3: %x\n", r3);
-#endif
-	/* Channel A */
-	tty = NULL;
-	if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
-		write_zsreg(uap_a, R0, RES_H_IUS);
-		zssync(uap_a);		
-		if (r3 & CHAEXT)
-			pmz_status_handle(uap_a);
-		if (r3 & CHARxIP)
-			tty = pmz_receive_chars(uap_a);
-		if (r3 & CHATxIP)
-			pmz_transmit_chars(uap_a);
-		rc = IRQ_HANDLED;
-	}
-	spin_unlock(&uap_a->port.lock);
-	if (tty != NULL)
-		tty_flip_buffer_push(tty);
-
-	if (uap_b->node == NULL)
-		goto out;
-
-	spin_lock(&uap_b->port.lock);
-	tty = NULL;
-	if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
-		write_zsreg(uap_b, R0, RES_H_IUS);
-		zssync(uap_b);
-		if (r3 & CHBEXT)
-			pmz_status_handle(uap_b);
-		if (r3 & CHBRxIP)
-			tty = pmz_receive_chars(uap_b);
-		if (r3 & CHBTxIP)
-			pmz_transmit_chars(uap_b);
-		rc = IRQ_HANDLED;
-	}
-	spin_unlock(&uap_b->port.lock);
-	if (tty != NULL)
-		tty_flip_buffer_push(tty);
-
- out:
-#ifdef DEBUG_HARD
-	pmz_debug("irq done.\n");
-#endif
-	return rc;
-}
-
-/*
- * Peek the status register, lock not held by caller
- */
-static inline u8 pmz_peek_status(struct uart_pmac_port *uap)
-{
-	unsigned long flags;
-	u8 status;
-	
-	spin_lock_irqsave(&uap->port.lock, flags);
-	status = read_zsreg(uap, R0);
-	spin_unlock_irqrestore(&uap->port.lock, flags);
-
-	return status;
-}
-
-/* 
- * Check if transmitter is empty
- * The port lock is not held.
- */
-static unsigned int pmz_tx_empty(struct uart_port *port)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-	unsigned char status;
-
-	if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
-		return TIOCSER_TEMT;
-
-	status = pmz_peek_status(to_pmz(port));
-	if (status & Tx_BUF_EMP)
-		return TIOCSER_TEMT;
-	return 0;
-}
-
-/* 
- * Set Modem Control (RTS & DTR) bits
- * The port lock is held and interrupts are disabled.
- * Note: Shall we really filter out RTS on external ports or
- * should that be dealt at higher level only ?
- */
-static void pmz_set_mctrl(struct uart_port *port, unsigned int mctrl)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-	unsigned char set_bits, clear_bits;
-
-        /* Do nothing for irda for now... */
-	if (ZS_IS_IRDA(uap))
-		return;
-	/* We get called during boot with a port not up yet */
-	if (ZS_IS_ASLEEP(uap) ||
-	    !(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)))
-		return;
-
-	set_bits = clear_bits = 0;
-
-	if (ZS_IS_INTMODEM(uap)) {
-		if (mctrl & TIOCM_RTS)
-			set_bits |= RTS;
-		else
-			clear_bits |= RTS;
-	}
-	if (mctrl & TIOCM_DTR)
-		set_bits |= DTR;
-	else
-		clear_bits |= DTR;
-
-	/* NOTE: Not subject to 'transmitter active' rule.  */ 
-	uap->curregs[R5] |= set_bits;
-	uap->curregs[R5] &= ~clear_bits;
-	if (ZS_IS_ASLEEP(uap))
-		return;
-	write_zsreg(uap, R5, uap->curregs[R5]);
-	pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n",
-		  set_bits, clear_bits, uap->curregs[R5]);
-	zssync(uap);
-}
-
-/* 
- * Get Modem Control bits (only the input ones, the core will
- * or that with a cached value of the control ones)
- * The port lock is held and interrupts are disabled.
- */
-static unsigned int pmz_get_mctrl(struct uart_port *port)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-	unsigned char status;
-	unsigned int ret;
-
-	if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
-		return 0;
-
-	status = read_zsreg(uap, R0);
-
-	ret = 0;
-	if (status & DCD)
-		ret |= TIOCM_CAR;
-	if (status & SYNC_HUNT)
-		ret |= TIOCM_DSR;
-	if (!(status & CTS))
-		ret |= TIOCM_CTS;
-
-	return ret;
-}
-
-/* 
- * Stop TX side. Dealt like sunzilog at next Tx interrupt,
- * though for DMA, we will have to do a bit more.
- * The port lock is held and interrupts are disabled.
- */
-static void pmz_stop_tx(struct uart_port *port)
-{
-	to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED;
-}
-
-/* 
- * Kick the Tx side.
- * The port lock is held and interrupts are disabled.
- */
-static void pmz_start_tx(struct uart_port *port)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-	unsigned char status;
-
-	pmz_debug("pmz: start_tx()\n");
-
-	uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
-	uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
-
-	if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
-		return;
-
-	status = read_zsreg(uap, R0);
-
-	/* TX busy?  Just wait for the TX done interrupt.  */
-	if (!(status & Tx_BUF_EMP))
-		return;
-
-	/* Send the first character to jump-start the TX done
-	 * IRQ sending engine.
-	 */
-	if (port->x_char) {
-		write_zsdata(uap, port->x_char);
-		zssync(uap);
-		port->icount.tx++;
-		port->x_char = 0;
-	} else {
-		struct circ_buf *xmit = &port->state->xmit;
-
-		write_zsdata(uap, xmit->buf[xmit->tail]);
-		zssync(uap);
-		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
-		port->icount.tx++;
-
-		if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
-			uart_write_wakeup(&uap->port);
-	}
-	pmz_debug("pmz: start_tx() done.\n");
-}
-
-/* 
- * Stop Rx side, basically disable emitting of
- * Rx interrupts on the port. We don't disable the rx
- * side of the chip proper though
- * The port lock is held.
- */
-static void pmz_stop_rx(struct uart_port *port)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-
-	if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
-		return;
-
-	pmz_debug("pmz: stop_rx()()\n");
-
-	/* Disable all RX interrupts.  */
-	uap->curregs[R1] &= ~RxINT_MASK;
-	pmz_maybe_update_regs(uap);
-
-	pmz_debug("pmz: stop_rx() done.\n");
-}
-
-/* 
- * Enable modem status change interrupts
- * The port lock is held.
- */
-static void pmz_enable_ms(struct uart_port *port)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-	unsigned char new_reg;
-
-	if (ZS_IS_IRDA(uap) || uap->node == NULL)
-		return;
-	new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
-	if (new_reg != uap->curregs[R15]) {
-		uap->curregs[R15] = new_reg;
-
-		if (ZS_IS_ASLEEP(uap))
-			return;
-		/* NOTE: Not subject to 'transmitter active' rule. */
-		write_zsreg(uap, R15, uap->curregs[R15]);
-	}
-}
-
-/* 
- * Control break state emission
- * The port lock is not held.
- */
-static void pmz_break_ctl(struct uart_port *port, int break_state)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-	unsigned char set_bits, clear_bits, new_reg;
-	unsigned long flags;
-
-	if (uap->node == NULL)
-		return;
-	set_bits = clear_bits = 0;
-
-	if (break_state)
-		set_bits |= SND_BRK;
-	else
-		clear_bits |= SND_BRK;
-
-	spin_lock_irqsave(&port->lock, flags);
-
-	new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits;
-	if (new_reg != uap->curregs[R5]) {
-		uap->curregs[R5] = new_reg;
-
-		/* NOTE: Not subject to 'transmitter active' rule. */
-		if (ZS_IS_ASLEEP(uap)) {
-			spin_unlock_irqrestore(&port->lock, flags);
-			return;
-		}
-		write_zsreg(uap, R5, uap->curregs[R5]);
-	}
-
-	spin_unlock_irqrestore(&port->lock, flags);
-}
-
-#ifdef CONFIG_PPC_PMAC
-
-/*
- * Turn power on or off to the SCC and associated stuff
- * (port drivers, modem, IR port, etc.)
- * Returns the number of milliseconds we should wait before
- * trying to use the port.
- */
-static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
-{
-	int delay = 0;
-	int rc;
-
-	if (state) {
-		rc = pmac_call_feature(
-			PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1);
-		pmz_debug("port power on result: %d\n", rc);
-		if (ZS_IS_INTMODEM(uap)) {
-			rc = pmac_call_feature(
-				PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1);
-			delay = 2500;	/* wait for 2.5s before using */
-			pmz_debug("modem power result: %d\n", rc);
-		}
-	} else {
-		/* TODO: Make that depend on a timer, don't power down
-		 * immediately
-		 */
-		if (ZS_IS_INTMODEM(uap)) {
-			rc = pmac_call_feature(
-				PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0);
-			pmz_debug("port power off result: %d\n", rc);
-		}
-		pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0);
-	}
-	return delay;
-}
-
-#else
-
-static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
-{
-	return 0;
-}
-
-#endif /* !CONFIG_PPC_PMAC */
-
-/*
- * FixZeroBug....Works around a bug in the SCC receving channel.
- * Inspired from Darwin code, 15 Sept. 2000  -DanM
- *
- * The following sequence prevents a problem that is seen with O'Hare ASICs
- * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
- * at the input to the receiver becomes 'stuck' and locks up the receiver.
- * This problem can occur as a result of a zero bit at the receiver input
- * coincident with any of the following events:
- *
- *	The SCC is initialized (hardware or software).
- *	A framing error is detected.
- *	The clocking option changes from synchronous or X1 asynchronous
- *		clocking to X16, X32, or X64 asynchronous clocking.
- *	The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
- *
- * This workaround attempts to recover from the lockup condition by placing
- * the SCC in synchronous loopback mode with a fast clock before programming
- * any of the asynchronous modes.
- */
-static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap)
-{
-	write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
-	zssync(uap);
-	udelay(10);
-	write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
-	zssync(uap);
-
-	write_zsreg(uap, 4, X1CLK | MONSYNC);
-	write_zsreg(uap, 3, Rx8);
-	write_zsreg(uap, 5, Tx8 | RTS);
-	write_zsreg(uap, 9, NV);	/* Didn't we already do this? */
-	write_zsreg(uap, 11, RCBR | TCBR);
-	write_zsreg(uap, 12, 0);
-	write_zsreg(uap, 13, 0);
-	write_zsreg(uap, 14, (LOOPBAK | BRSRC));
-	write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));
-	write_zsreg(uap, 3, Rx8 | RxENABLE);
-	write_zsreg(uap, 0, RES_EXT_INT);
-	write_zsreg(uap, 0, RES_EXT_INT);
-	write_zsreg(uap, 0, RES_EXT_INT);	/* to kill some time */
-
-	/* The channel should be OK now, but it is probably receiving
-	 * loopback garbage.
-	 * Switch to asynchronous mode, disable the receiver,
-	 * and discard everything in the receive buffer.
-	 */
-	write_zsreg(uap, 9, NV);
-	write_zsreg(uap, 4, X16CLK | SB_MASK);
-	write_zsreg(uap, 3, Rx8);
-
-	while (read_zsreg(uap, 0) & Rx_CH_AV) {
-		(void)read_zsreg(uap, 8);
-		write_zsreg(uap, 0, RES_EXT_INT);
-		write_zsreg(uap, 0, ERR_RES);
-	}
-}
-
-/*
- * Real startup routine, powers up the hardware and sets up
- * the SCC. Returns a delay in ms where you need to wait before
- * actually using the port, this is typically the internal modem
- * powerup delay. This routine expect the lock to be taken.
- */
-static int __pmz_startup(struct uart_pmac_port *uap)
-{
-	int pwr_delay = 0;
-
-	memset(&uap->curregs, 0, sizeof(uap->curregs));
-
-	/* Power up the SCC & underlying hardware (modem/irda) */
-	pwr_delay = pmz_set_scc_power(uap, 1);
-
-	/* Nice buggy HW ... */
-	pmz_fix_zero_bug_scc(uap);
-
-	/* Reset the channel */
-	uap->curregs[R9] = 0;
-	write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
-	zssync(uap);
-	udelay(10);
-	write_zsreg(uap, 9, 0);
-	zssync(uap);
-
-	/* Clear the interrupt registers */
-	write_zsreg(uap, R1, 0);
-	write_zsreg(uap, R0, ERR_RES);
-	write_zsreg(uap, R0, ERR_RES);
-	write_zsreg(uap, R0, RES_H_IUS);
-	write_zsreg(uap, R0, RES_H_IUS);
-
-	/* Setup some valid baud rate */
-	uap->curregs[R4] = X16CLK | SB1;
-	uap->curregs[R3] = Rx8;
-	uap->curregs[R5] = Tx8 | RTS;
-	if (!ZS_IS_IRDA(uap))
-		uap->curregs[R5] |= DTR;
-	uap->curregs[R12] = 0;
-	uap->curregs[R13] = 0;
-	uap->curregs[R14] = BRENAB;
-
-	/* Clear handshaking, enable BREAK interrupts */
-	uap->curregs[R15] = BRKIE;
-
-	/* Master interrupt enable */
-	uap->curregs[R9] |= NV | MIE;
-
-	pmz_load_zsregs(uap, uap->curregs);
-
-	/* Enable receiver and transmitter.  */
-	write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
-	write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
-
-	/* Remember status for DCD/CTS changes */
-	uap->prev_status = read_zsreg(uap, R0);
-
-	return pwr_delay;
-}
-
-static void pmz_irda_reset(struct uart_pmac_port *uap)
-{
-	uap->curregs[R5] |= DTR;
-	write_zsreg(uap, R5, uap->curregs[R5]);
-	zssync(uap);
-	mdelay(110);
-	uap->curregs[R5] &= ~DTR;
-	write_zsreg(uap, R5, uap->curregs[R5]);
-	zssync(uap);
-	mdelay(10);
-}
-
-/*
- * This is the "normal" startup routine, using the above one
- * wrapped with the lock and doing a schedule delay
- */
-static int pmz_startup(struct uart_port *port)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-	unsigned long flags;
-	int pwr_delay = 0;
-
-	pmz_debug("pmz: startup()\n");
-
-	if (ZS_IS_ASLEEP(uap))
-		return -EAGAIN;
-	if (uap->node == NULL)
-		return -ENODEV;
-
-	mutex_lock(&pmz_irq_mutex);
-
-	uap->flags |= PMACZILOG_FLAG_IS_OPEN;
-
-	/* A console is never powered down. Else, power up and
-	 * initialize the chip
-	 */
-	if (!ZS_IS_CONS(uap)) {
-		spin_lock_irqsave(&port->lock, flags);
-		pwr_delay = __pmz_startup(uap);
-		spin_unlock_irqrestore(&port->lock, flags);
-	}	
-
-	pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON;
-	if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED,
-			"SCC", uap)) {
-		pmz_error("Unable to register zs interrupt handler.\n");
-		pmz_set_scc_power(uap, 0);
-		mutex_unlock(&pmz_irq_mutex);
-		return -ENXIO;
-	}
-
-	mutex_unlock(&pmz_irq_mutex);
-
-	/* Right now, we deal with delay by blocking here, I'll be
-	 * smarter later on
-	 */
-	if (pwr_delay != 0) {
-		pmz_debug("pmz: delaying %d ms\n", pwr_delay);
-		msleep(pwr_delay);
-	}
-
-	/* IrDA reset is done now */
-	if (ZS_IS_IRDA(uap))
-		pmz_irda_reset(uap);
-
-	/* Enable interrupts emission from the chip */
-	spin_lock_irqsave(&port->lock, flags);
-	uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
-	if (!ZS_IS_EXTCLK(uap))
-		uap->curregs[R1] |= EXT_INT_ENAB;
-	write_zsreg(uap, R1, uap->curregs[R1]);
-	spin_unlock_irqrestore(&port->lock, flags);
-
-	pmz_debug("pmz: startup() done.\n");
-
-	return 0;
-}
-
-static void pmz_shutdown(struct uart_port *port)
-{
-	struct uart_pmac_port *uap = to_pmz(port);
-	unsigned long flags;
-
-	pmz_debug("pmz: shutdown()\n");
-
-	if (uap->node == NULL)
-		return;
-
-	mutex_lock(&pmz_irq_mutex);
-
-	/* Release interrupt handler */
-	free_irq(uap->port.irq, uap);
-
-	spin_lock_irqsave(&port->lock, flags);
-
-	uap->flags &= ~PMACZILOG_FLAG_IS_OPEN;
-
-	if (!ZS_IS_OPEN(uap->mate))
-		pmz_get_port_A(uap)->flags &= ~PMACZILOG_FLAG_IS_IRQ_ON;
-
-	/* Disable interrupts */
-	if (!ZS_IS_ASLEEP(uap)) {
-		uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
-		write_zsreg(uap, R1, uap->curregs[R1]);
-		zssync(uap);
-	}
-
-	if (ZS_IS_CONS(uap) || ZS_IS_ASLEEP(uap)) {
-		spin_unlock_irqrestore(&port->lock, flags);
-		mutex_unlock(&pmz_irq_mutex);
-		return;
-	}
-
-	/* Disable receiver and transmitter.  */
-	uap->curregs[R3] &= ~RxENABLE;
-	uap->curregs[R5] &= ~TxENABLE;
-
-	/* Disable all interrupts and BRK assertion.  */
-	uap->curregs[R5] &= ~SND_BRK;
-	pmz_maybe_update_regs(uap);
-
-	/* Shut the chip down */
-	pmz_set_scc_power(uap, 0);
-
-	spin_unlock_irqrestore(&port->lock, flags);
-
-	mutex_unlock(&pmz_irq_mutex);
-
-	pmz_debug("pmz: shutdown() done.\n");
-}
-
-/* Shared by TTY driver and serial console setup.  The port lock is held
- * and local interrupts are disabled.
- */
-static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
-			      unsigned int iflag, unsigned long baud)
-{
-	int brg;
-
-	/* Switch to external clocking for IrDA high clock rates. That
-	 * code could be re-used for Midi interfaces with different
-	 * multipliers
-	 */
-	if (baud >= 115200 && ZS_IS_IRDA(uap)) {
-		uap->curregs[R4] = X1CLK;
-		uap->curregs[R11] = RCTRxCP | TCTRxCP;
-		uap->curregs[R14] = 0; /* BRG off */
-		uap->curregs[R12] = 0;
-		uap->curregs[R13] = 0;
-		uap->flags |= PMACZILOG_FLAG_IS_EXTCLK;
-	} else {
-		switch (baud) {
-		case ZS_CLOCK/16:	/* 230400 */
-			uap->curregs[R4] = X16CLK;
-			uap->curregs[R11] = 0;
-			uap->curregs[R14] = 0;
-			break;
-		case ZS_CLOCK/32:	/* 115200 */
-			uap->curregs[R4] = X32CLK;
-			uap->curregs[R11] = 0;
-			uap->curregs[R14] = 0;
-			break;
-		default:
-			uap->curregs[R4] = X16CLK;
-			uap->curregs[R11] = TCBR | RCBR;
-			brg = BPS_TO_BRG(baud, ZS_CLOCK / 16);
-			uap->curregs[R12] = (brg & 255);
-			uap->curregs[R13] = ((brg >> 8) & 255);
-			uap->curregs[R14] = BRENAB;
-		}
-		uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK;
-	}
-
-	/* Character size, stop bits, and parity. */
-	uap->curregs[3] &= ~RxN_MASK;
-	uap->curregs[5] &= ~TxN_MASK;
-
-	switch (cflag & CSIZE) {
-	case CS5:
-		uap->curregs[3] |= Rx5;
-		uap->curregs[5] |= Tx5;
-		uap->parity_mask = 0x1f;
-		break;
-	case CS6:
-		uap->curregs[3] |= Rx6;
-		uap->curregs[5] |= Tx6;
-		uap->parity_mask = 0x3f;
-		break;
-	case CS7:
-		uap->curregs[3] |= Rx7;
-		uap->curregs[5] |= Tx7;
-		uap->parity_mask = 0x7f;
-		break;
-	case CS8:
-	default:
-		uap->curregs[3] |= Rx8;
-		uap->curregs[5] |= Tx8;
-		uap->parity_mask = 0xff;
-		break;
-	};
-	uap->curregs[4] &= ~(SB_MASK);
-	if (cflag & CSTOPB)
-		uap->curregs[4] |= SB2;
-	else
-		uap->curregs[4] |= SB1;
-	if (cflag & PARENB)
-		uap->curregs[4] |= PAR_ENAB;
-	else
-		uap->curregs[4] &= ~PAR_ENAB;
-	if (!(cflag & PARODD))
-		uap->curregs[4] |= PAR_EVEN;
-	else
-		uap->curregs[4] &= ~PAR_EVEN;
-
-	uap->port.read_status_mask = Rx_OVR;
-	if (iflag & INPCK)
-		uap->port.read_status_mask |= CRC_ERR | PAR_ERR;
-	if (iflag & (BRKINT | PARMRK))
-		uap->port.read_status_mask |= BRK_ABRT;
-
-	uap->port.ignore_status_mask = 0;
-	if (iflag & IGNPAR)
-		uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR;
-	if (iflag & IGNBRK) {
-		uap->port.ignore_status_mask |= BRK_ABRT;
-		if