diff options
author | Likun Gao <Likun.Gao@amd.com> | 2020-04-28 16:42:30 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-01 01:59:13 -0400 |
commit | 9af9fe5bf3e06471666f26fa5dbc271825d04ae4 (patch) | |
tree | 8d6877823e900bb3f20306dac65d34bffcdfc6d6 /drivers/gpu/drm/amd | |
parent | 7cf700478d70cc1235587dbdb9ea00581bf545ac (diff) |
drm/amd/powerplay: support mclk socclk limit value set for sienna_cichlid.
Add support to force and unforce MCLK or SOCCLK to dpm limit value.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c index 667c912e47fd..ef8532ff8e30 100644 --- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c @@ -945,6 +945,8 @@ static int sienna_cichlid_force_dpm_limit_value(struct smu_context *smu, bool hi enum smu_clk_type clks[] = { SMU_GFXCLK, + SMU_MCLK, + SMU_SOCCLK, }; for (i = 0; i < ARRAY_SIZE(clks); i++) { @@ -970,6 +972,8 @@ static int sienna_cichlid_unforce_dpm_levels(struct smu_context *smu) enum smu_clk_type clks[] = { SMU_GFXCLK, + SMU_MCLK, + SMU_SOCCLK, }; for (i = 0; i < ARRAY_SIZE(clks); i++) { |