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authorKenneth Feng <kenneth.feng@amd.com>2020-05-07 14:33:06 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-07-01 01:59:13 -0400
commitba818620db217b5ed1f8fc65fb14d63772f55836 (patch)
tree45937320b27d67fca55b05997cf02470fb707b50 /drivers/gpu/drm/amd/powerplay
parente0da123a0495e75a7456faaf66e0a334887a80a2 (diff)
drm/amd/powerplay: show gfxclk=0 in gfxoff state
The instant retrieved gfxclk value should be 0 in gfxoff state. This can be fetched with gfxoff enabled. Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay')
-rw-r--r--drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 10114132fdd8..c924ecf2899f 100644
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -709,9 +709,6 @@ static int sienna_cichlid_print_clk_levels(struct smu_context *smu,
uint32_t mark_index = 0;
uint32_t gen_speed, lane_width;
- if ((clk_type == SMU_GFXCLK) || (clk_type == SMU_SCLK))
- amdgpu_gfx_off_ctrl(adev, false);
-
switch (clk_type) {
case SMU_GFXCLK:
case SMU_SCLK:
@@ -727,6 +724,10 @@ static int sienna_cichlid_print_clk_levels(struct smu_context *smu,
/* 10KHz -> MHz */
cur_value = cur_value / 100;
+ /* no need to disable gfxoff when retrieving the current gfxclk */
+ if ((clk_type == SMU_GFXCLK) || (clk_type == SMU_SCLK))
+ amdgpu_gfx_off_ctrl(adev, false);
+
ret = smu_get_dpm_level_count(smu, clk_type, &count);
if (ret)
goto print_clk_out;