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| author | Neil Armstrong <narmstrong@baylibre.com> | 2019-03-04 14:11:29 +0100 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2019-04-01 10:45:11 +0200 |
| commit | 370294e2667fa1648eb05aab6c4657419634ff83 (patch) | |
| tree | 3311a34764422bfdca967965cc927260e9b85d57 /drivers/clk/meson/clk-regmap.h | |
| parent | 77a725ff7a640ab24ff9cf9450e6eae072c49f16 (diff) | |
clk: meson: g12a: add cpu clocks
Add the Amlogic G12A Family CPU Clock tree in read/only for now.
The CPU clock can either use the SYS_PLL for > 1GHz frequencies or
use a couple of div+mux from 1GHz/667MHz/24MHz source with 2 non-glitch
muxes.
Proper DVFS support will come in a second time.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: fixed cpu clocks namings]
Link: https://lkml.kernel.org/r/20190304131129.7762-3-narmstrong@baylibre.com
Diffstat (limited to 'drivers/clk/meson/clk-regmap.h')
0 files changed, 0 insertions, 0 deletions