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authorLinus Torvalds <torvalds@linux-foundation.org>2017-07-04 14:34:51 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-07-04 14:34:51 -0700
commit8ca302e9c61a1b8852f4bd4def8e7ff59f4c729a (patch)
tree0fe462aa3d2ccb0abaf171a3e5d495518c176276 /arch
parent612341bda6ada2bfb2f606e0ce894fca5b6468d9 (diff)
parent18cfd9429d8a82c49add8f3ca9d366599bfcac45 (diff)
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is for a few platforms: - Andres Färber adds initial support for the Actions Semi S500 (aka 'owl') platform, a close relative of the S900 platform he adds for arm64. - in mach-omap2, we remove more legacy code - Rockchips gains support for the RV1108 SoC designed for camera applications. - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70) - Minor updates for other platforms, including davinci, s3c64xx, prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits) ARM: owl: smp: Drop bogus holding pen ARM: owl: Drop custom machine ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3 soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating soc: actions: Add Owl SPS dt-bindings: power: Add Owl SPS power domains MAINTAINERS: Update Actions Semi section with SPS ARM: owl: Implement CPU enable-method for S500 MAINTAINERS: Add Actions Semi Owl section ARM: Prepare Actions Semi S500 ARM: socfpga: Increase max number of GPIOs ARM: stm32: Introduce MACH_STM32F469 flag ARM: prima2: remove redundant select CPU_V7 ARM: davinci: fix const warnings ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON ARM: OMAP4: hwmod_data: add SHAM crypto accelerator ARM: OMAP4: hwmod data: add des ARM: OMAP4: hwmod data: add aes2 ARM: OMAP4: hwmod data: add aes1 ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe() ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/Kconfig.debug41
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/mach-actions/Kconfig16
-rw-r--r--arch/arm/mach-actions/Makefile3
-rw-r--r--arch/arm/mach-actions/headsmp.S52
-rw-r--r--arch/arm/mach-actions/platsmp.c171
-rw-r--r--arch/arm/mach-at91/Kconfig16
-rw-r--r--arch/arm/mach-at91/Makefile4
-rw-r--r--arch/arm/mach-at91/Makefile.boot3
-rw-r--r--arch/arm/mach-at91/generic.h2
-rw-r--r--arch/arm/mach-at91/pm.c206
-rw-r--r--arch/arm/mach-at91/pm.h5
-rw-r--r--arch/arm/mach-at91/pm_data-offsets.c3
-rw-r--r--arch/arm/mach-at91/pm_suspend.S73
-rw-r--r--arch/arm/mach-at91/sama5.c19
-rw-r--r--arch/arm/mach-at91/samv7.c25
-rw-r--r--arch/arm/mach-bcm/Kconfig2
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c4
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c30
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h5
-rw-r--r--arch/arm/mach-davinci/pdata-quirks.c4
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/cpu.c3
-rw-r--r--arch/arm/mach-imx/mxc.h6
-rw-r--r--arch/arm/mach-imx/pm-imx6.c6
-rw-r--r--arch/arm/mach-meson/Kconfig1
-rw-r--r--arch/arm/mach-omap1/dma.c5
-rw-r--r--arch/arm/mach-omap1/timer.c4
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c14
-rw-r--r--arch/arm/mach-omap2/clockdomain.c8
-rw-r--r--arch/arm/mach-omap2/clockdomain.h2
-rw-r--r--arch/arm/mach-omap2/cm.h7
-rw-r--r--arch/arm/mach-omap2/cm2xxx_3xxx.h4
-rw-r--r--arch/arm/mach-omap2/cm33xx.c4
-rw-r--r--arch/arm/mach-omap2/cm3xxx.c3
-rw-r--r--arch/arm/mach-omap2/cm_common.c31
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c29
-rw-r--r--arch/arm/mach-omap2/devices.c175
-rw-r--r--arch/arm/mach-omap2/hsmmc.c5
-rw-r--r--arch/arm/mach-omap2/io.c59
-rw-r--r--arch/arm/mach-omap2/mcbsp.c70
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c68
-rw-r--r--arch/arm/mach-omap2/omap_device.c5
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c168
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c146
-rw-r--r--arch/arm/mach-omap2/opp.c104
-rw-r--r--arch/arm/mach-omap2/opp3xxx_data.c86
-rw-r--r--arch/arm/mach-omap2/opp4xxx_data.c79
-rw-r--r--arch/arm/mach-omap2/pm.c2
-rw-r--r--arch/arm/mach-omap2/pmu.c97
-rw-r--r--arch/arm/mach-omap2/prcm-common.h7
-rw-r--r--arch/arm/mach-omap2/prcm_mpu44xx.c4
-rw-r--r--arch/arm/mach-omap2/prcm_mpu_44xx_54xx.h4
-rw-r--r--arch/arm/mach-omap2/prm.h2
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.h4
-rw-r--r--arch/arm/mach-omap2/prm33xx.c4
-rw-r--r--arch/arm/mach-omap2/prm3xxx.c19
-rw-r--r--arch/arm/mach-omap2/prm44xx.c63
-rw-r--r--arch/arm/mach-omap2/prm_common.c32
-rw-r--r--arch/arm/mach-omap2/prminst44xx.c16
-rw-r--r--arch/arm/mach-omap2/sr_device.c15
-rw-r--r--arch/arm/mach-omap2/timer.c200
-rw-r--r--arch/arm/mach-omap2/wd_timer.c28
-rw-r--r--arch/arm/mach-prima2/Kconfig1
-rw-r--r--arch/arm/mach-pxa/include/mach/magician.h1
-rw-r--r--arch/arm/mach-pxa/magician.c84
-rw-r--r--arch/arm/mach-pxa/pm.c4
-rw-r--r--arch/arm/mach-pxa/pxa3xx-ulpi.c6
-rw-r--r--arch/arm/mach-rockchip/rockchip.c1
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig1
-rw-r--r--arch/arm/mach-shmobile/pm-rmobile.c19
-rw-r--r--arch/arm/mach-stm32/Kconfig5
75 files changed, 1284 insertions, 1123 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 43f45d3b40e8..abd59fad1a34 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -712,6 +712,8 @@ config ARCH_VIRT
#
source "arch/arm/mach-mvebu/Kconfig"
+source "arch/arm/mach-actions/Kconfig"
+
source "arch/arm/mach-alpine/Kconfig"
source "arch/arm/mach-artpec/Kconfig"
@@ -1462,6 +1464,7 @@ config ARM_PSCI
# selected platforms.
config ARCH_NR_GPIO
int
+ default 2048 if ARCH_SOCFPGA
default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
ARCH_ZYNQ
default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 426d2716f55d..447629d89884 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -145,6 +145,15 @@ choice
Say Y here if you want kernel low-level debugging support
on the USART3 port of sama5d4.
+ config DEBUG_AT91_SAMV7_USART1
+ bool "Kernel low-level debugging via SAMV7 USART1"
+ select DEBUG_AT91_UART
+ depends on SOC_SAMV7
+ help
+ Say Y here if you want the debug print routines to direct
+ their output to the USART1 port on SAMV7 based
+ machines.
+
config DEBUG_BCM2835
bool "Kernel low-level debugging on BCM2835 PL011 UART"
depends on ARCH_BCM2835 && ARCH_MULTI_V6
@@ -751,6 +760,7 @@ choice
ARCH DEBUG_UART_PHYS DEBUG_UART_VIRT
APQ8064 0x16640000 0xf0040000
APQ8084 0xf995e000 0xfa75e000
+ IPQ4019 0x078af000 0xf78af000
MSM8X60 0x19c40000 0xf0040000
MSM8960 0x16440000 0xf0040000
MSM8974 0xf991e000 0xfa71e000
@@ -776,6 +786,30 @@ choice
their output to the standard serial port on the RealView
PB1176 platform.
+ config DEBUG_RV1108_UART0
+ bool "Kernel low-level debugging messages via Rockchip RV1108 UART0"
+ depends on ARCH_ROCKCHIP
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Rockchip RV1108 based platforms.
+
+ config DEBUG_RV1108_UART1
+ bool "Kernel low-level debugging messages via Rockchip RV1108 UART1"
+ depends on ARCH_ROCKCHIP
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Rockchip RV1108 based platforms.
+
+ config DEBUG_RV1108_UART2
+ bool "Kernel low-level debugging messages via Rockchip RV1108 UART2"
+ depends on ARCH_ROCKCHIP
+ select DEBUG_UART_8250
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Rockchip RV1108 based platforms.
+
config DEBUG_RK29_UART0
bool "Kernel low-level debugging messages via Rockchip RK29 UART0"
depends on ARCH_ROCKCHIP
@@ -1465,6 +1499,9 @@ config DEBUG_UART_PHYS
default 0x10126000 if DEBUG_RK3X_UART1
default 0x101f1000 if DEBUG_VERSATILE
default 0x101fb000 if DEBUG_NOMADIK_UART
+ default 0x10210000 if DEBUG_RV1108_UART2
+ default 0x10220000 if DEBUG_RV1108_UART1
+ default 0x10230000 if DEBUG_RV1108_UART0
default 0x11002000 if DEBUG_MT8127_UART0
default 0x11006000 if DEBUG_MT6589_UART0
default 0x11009000 if DEBUG_MT8135_UART3
@@ -1481,6 +1518,7 @@ config DEBUG_UART_PHYS
default 0x3f201000 if DEBUG_BCM2836
default 0x3e000000 if DEBUG_BCM_KONA_UART
default 0x4000e400 if DEBUG_LL_UART_EFM32
+ default 0x40028000 if DEBUG_AT91_SAMV7_USART1
default 0x40081000 if DEBUG_LPC18XX_UART0
default 0x40090000 if DEBUG_LPC32XX
default 0x40100000 if DEBUG_PXA_UART1
@@ -1563,6 +1601,9 @@ config DEBUG_UART_PHYS
config DEBUG_UART_VIRT
hex "Virtual base address of debug UART"
+ default 0xc881f000 if DEBUG_RV1108_UART2
+ default 0xc8821000 if DEBUG_RV1108_UART1
+ default 0xc8912000 if DEBUG_RV1108_UART0
default 0xe0000a00 if DEBUG_NETX_UART
default 0xe0010fe0 if ARCH_RPC
default 0xf0000be0 if ARCH_EBSA110
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 65f4e2a4eb94..47d3a1ab08d2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -151,6 +151,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
+machine-$(CONFIG_ARCH_ACTIONS) += actions
machine-$(CONFIG_ARCH_ALPINE) += alpine
machine-$(CONFIG_ARCH_ARTPEC) += artpec
machine-$(CONFIG_ARCH_AT91) += at91
diff --git a/arch/arm/mach-actions/Kconfig b/arch/arm/mach-actions/Kconfig
new file mode 100644
index 000000000000..ad9c5c89c683
--- /dev/null
+++ b/arch/arm/mach-actions/Kconfig
@@ -0,0 +1,16 @@
+menuconfig ARCH_ACTIONS
+ bool "Actions Semi SoCs"
+ depends on ARCH_MULTI_V7
+ select ARM_AMBA
+ select ARM_GIC
+ select ARM_GLOBAL_TIMER
+ select CACHE_L2X0
+ select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
+ select COMMON_CLK
+ select GENERIC_IRQ_CHIP
+ select HAVE_ARM_SCU if SMP
+ select HAVE_ARM_TWD if SMP
+ select OWL_PM_DOMAINS_HELPER
+ select OWL_TIMER
+ help
+ This enables support for the Actions Semiconductor S500 SoC family.
diff --git a/arch/arm/mach-actions/Makefile b/arch/arm/mach-actions/Makefile
new file mode 100644
index 000000000000..c0f116241da7
--- /dev/null
+++ b/arch/arm/mach-actions/Makefile
@@ -0,0 +1,3 @@
+obj-${CONFIG_SMP} += platsmp.o headsmp.o
+
+AFLAGS_headsmp.o := -Wa,-march=armv7-a
diff --git a/arch/arm/mach-actions/headsmp.S b/arch/arm/mach-actions/headsmp.S
new file mode 100644
index 000000000000..65f53bdb69e7
--- /dev/null
+++ b/arch/arm/mach-actions/headsmp.S
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2012 Actions Semi Inc.
+ * Author: Actions Semi, Inc.
+ *
+ * Copyright (c) 2017 Andreas Färber
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/linkage.h>
+#include <linux/init.h>
+
+ENTRY(owl_v7_invalidate_l1)
+ mov r0, #0
+ mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
+ mcr p15, 2, r0, c0, c0, 0
+ mrc p15, 1, r0, c0, c0, 0
+
+ ldr r1, =0x7fff
+ and r2, r1, r0, lsr #13
+
+ ldr r1, =0x3ff
+
+ and r3, r1, r0, lsr #3 @ NumWays - 1
+ add r2, r2, #1 @ NumSets
+
+ and r0, r0, #0x7
+ add r0, r0, #4 @ SetShift
+
+ clz r1, r3 @ WayShift
+ add r4, r3, #1 @ NumWays
+1: sub r2, r2, #1 @ NumSets--
+ mov r3, r4 @ Temp = NumWays
+2: subs r3, r3, #1 @ Temp--
+ mov r5, r3, lsl r1
+ mov r6, r2, lsl r0
+ orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
+ mcr p15, 0, r5, c7, c6, 2
+ bgt 2b
+ cmp r2, #0
+ bgt 1b
+ dsb
+ isb
+ mov pc, lr
+ENDPROC(owl_v7_invalidate_l1)
+
+ENTRY(owl_secondary_startup)
+ bl owl_v7_invalidate_l1
+ b secondary_startup
diff --git a/arch/arm/mach-actions/platsmp.c b/arch/arm/mach-actions/platsmp.c
new file mode 100644
index 000000000000..12a9e331b432
--- /dev/null
+++ b/arch/arm/mach-actions/platsmp.c
@@ -0,0 +1,171 @@
+/*
+ * Actions Semi Leopard
+ *
+ * This file is based on arm realview smp platform.
+ *
+ * Copyright 2012 Actions Semi Inc.
+ * Author: Actions Semi, Inc.
+ *
+ * Copyright (c) 2017 Andreas Färber
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/smp.h>
+#include <linux/soc/actions/owl-sps.h>
+#include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
+#include <asm/smp_scu.h>
+
+#define OWL_CPU1_ADDR 0x50
+#define OWL_CPU1_FLAG 0x5c
+
+#define OWL_CPUx_FLAG_BOOT 0x55aa
+
+#define OWL_SPS_PG_CTL_PWR_CPU2 BIT(5)
+#define OWL_SPS_PG_CTL_PWR_CPU3 BIT(6)
+#define OWL_SPS_PG_CTL_ACK_CPU2 BIT(21)
+#define OWL_SPS_PG_CTL_ACK_CPU3 BIT(22)
+
+static void __iomem *scu_base_addr;
+static void __iomem *sps_base_addr;
+static void __iomem *timer_base_addr;
+static int ncores;
+
+static DEFINE_SPINLOCK(boot_lock);
+
+void owl_secondary_startup(void);
+
+static int s500_wakeup_secondary(unsigned int cpu)
+{
+ int ret;
+
+ if (cpu > 3)
+ return -EINVAL;
+
+ /* The generic PM domain driver is not available this early. */
+ switch (cpu) {
+ case 2:
+ ret = owl_sps_set_pg(sps_base_addr,
+ OWL_SPS_PG_CTL_PWR_CPU2,
+ OWL_SPS_PG_CTL_ACK_CPU2, true);
+ if (ret)
+ return ret;
+ break;
+ case 3:
+ ret = owl_sps_set_pg(sps_base_addr,
+ OWL_SPS_PG_CTL_PWR_CPU3,
+ OWL_SPS_PG_CTL_ACK_CPU3, true);
+ if (ret)
+ return ret;
+ break;
+ }
+
+ /* wait for CPUx to run to WFE instruction */
+ udelay(200);
+
+ writel(virt_to_phys(owl_secondary_startup),
+ timer_base_addr + OWL_CPU1_ADDR + (cpu - 1) * 4);
+ writel(OWL_CPUx_FLAG_BOOT,
+ timer_base_addr + OWL_CPU1_FLAG + (cpu - 1) * 4);
+
+ dsb_sev();
+ mb();
+
+ return 0;
+}
+
+static int s500_smp_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ unsigned long timeout;
+ int ret;
+
+ ret = s500_wakeup_secondary(cpu);
+ if (ret)
+ return ret;
+
+ udelay(10);
+
+ spin_lock(&boot_lock);
+
+ smp_send_reschedule(cpu);
+
+ timeout = jiffies + (1 * HZ);
+ while (time_before(jiffies, timeout)) {
+ if (pen_release == -1)
+ break;
+ }
+
+ writel(0, timer_base_addr + OWL_CPU1_ADDR + (cpu - 1) * 4);
+ writel(0, timer_base_addr + OWL_CPU1_FLAG + (cpu - 1) * 4);
+
+ spin_unlock(&boot_lock);
+
+ return 0;
+}
+
+static void __init s500_smp_prepare_cpus(unsigned int max_cpus)
+{
+ struct device_node *node;
+
+ node = of_find_compatible_node(NULL, NULL, "actions,s500-timer");
+ if (!node) {
+ pr_err("%s: missing timer\n", __func__);
+ return;
+ }
+
+ timer_base_addr = of_iomap(node, 0);
+ if (!timer_base_addr) {
+ pr_err("%s: could not map timer registers\n", __func__);
+ return;
+ }
+
+ node = of_find_compatible_node(NULL, NULL, "actions,s500-sps");
+ if (!node) {
+ pr_err("%s: missing sps\n", __func__);
+ return;
+ }
+
+ sps_base_addr = of_iomap(node, 0);
+ if (!sps_base_addr) {
+ pr_err("%s: could not map sps registers\n", __func__);
+ return;
+ }
+
+ if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
+ node = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
+ if (!node) {
+ pr_err("%s: missing scu\n", __func__);
+ return;
+ }
+
+ scu_base_addr = of_iomap(node, 0);
+ if (!scu_base_addr) {
+ pr_err("%s: could not map scu registers\n", __func__);
+ return;
+ }
+
+ /*
+ * While the number of cpus is gathered from dt, also get the
+ * number of cores from the scu to verify this value when
+ * booting the cores.
+ */
+ ncores = scu_get_core_count(scu_base_addr);
+ pr_debug("%s: ncores %d\n", __func__, ncores);
+
+ scu_enable(scu_base_addr);
+ }
+}
+
+static const struct smp_operations s500_smp_ops __initconst = {
+ .smp_prepare_cpus = s500_smp_prepare_cpus,
+ .smp_boot_secondary = s500_smp_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(s500_smp, "actions,s500-smp", &s500_smp_ops);
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index cbd959b73654..d735e5fc4772 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -1,6 +1,6 @@
menuconfig ARCH_AT91
bool "Atmel SoCs"
- depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7
+ depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M
select ARM_CPU_SUSPEND if PM
select COMMON_CLK_AT91
select GPIOLIB
@@ -8,6 +8,14 @@ menuconfig ARCH_AT91
select SOC_BUS
if ARCH_AT91
+config SOC_SAMV7
+ bool "SAM Cortex-M7 family" if ARM_SINGLE_ARMV7M
+ select COMMON_CLK_AT91
+ select PINCTRL_AT91
+ help
+ Select this if you are using an SoC from Atmel's SAME7, SAMS7 or SAMV7
+ families.
+
config SOC_SAMA5D2
bool "SAMA5D2 family"
depends on ARCH_MULTI_V7
@@ -53,6 +61,7 @@ config SOC_AT91RM9200
bool "AT91RM9200"
depends on ARCH_MULTI_V4T
select ATMEL_AIC_IRQ
+ select ATMEL_PM if PM
select ATMEL_ST
select CPU_ARM920T
select HAVE_AT91_USB_CLK
@@ -66,6 +75,7 @@ config SOC_AT91SAM9
bool "AT91SAM9"
depends on ARCH_MULTI_V5
select ATMEL_AIC_IRQ
+ select ATMEL_PM if PM
select ATMEL_SDRAMC
select CPU_ARM926T
select HAVE_AT91_SMD
@@ -124,9 +134,13 @@ config SOC_SAM_V7
config SOC_SAMA5
bool
select ATMEL_AIC5_IRQ
+ select ATMEL_PM if PM
select ATMEL_SDRAMC
select MEMORY
select SOC_SAM_V7
select SRAM if PM
+config ATMEL_PM
+ bool
+
endif
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index cfd8f60a9268..ee34aa34cc51 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -6,10 +6,10 @@
obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o
obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o
obj-$(CONFIG_SOC_SAMA5) += sama5.o
+obj-$(CONFIG_SOC_SAMV7) += samv7.o
# Power Management
-obj-$(CONFIG_PM) += pm.o
-obj-$(CONFIG_PM) += pm_suspend.o
+obj-$(CONFIG_ATMEL_PM) += pm.o pm_suspend.o
ifeq ($(CONFIG_CPU_V7),y)
AFLAGS_pm_suspend.o := -march=armv7-a
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
new file mode 100644
index 000000000000..eacfc3f5c33e
--- /dev/nul