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authorJosh Wu <josh.wu@atmel.com>2012-06-29 17:47:55 +0800
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-07-06 18:23:25 +0100
commit1c7b874d33b463f7150b1ab4617f000af9b327fd (patch)
tree7041d310f5dde2d745908a89418da814d28e8460 /arch/avr32
parenta41b51a1f7c15a1b00f30a3ad2d0373ad51b883d (diff)
mtd: at91: atmel_nand: add Programmable Multibit ECC controller support
The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the address and size of PMECC, PMECC error location controllers and ROM. And also needs to pass the correction capability, the sector size and ROM lookup table offsets via dt. This driver has been tested on AT91SAM9X5-EK and AT91SAM9N12-EK with JFFS2, YAFFS2, UBIFS and mtd-utils. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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