diff options
author | Tomasz Figa <t.figa@samsung.com> | 2014-07-02 19:42:03 +0200 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-07-19 04:24:59 +0900 |
commit | 32726d2d5502302ba5753854f5f2f12ba22681c4 (patch) | |
tree | e432c5599c79ea3bdf7304477cdebb39e3a82c26 /arch/arm/mach-s5pv210 | |
parent | f73d4cb681d2ede6d31974dde3ecce7a3ae8e8ff (diff) |
ARM: SAMSUNG: Remove legacy clock code
Since S5PV210 now has a complete clock driver using Common Clock
Framework, there is no reason to keep the old code. Remove it together
with the whole legacy Samsung-specific clock framework which no longer
has any users.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r-- | arch/arm/mach-s5pv210/Kconfig | 9 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/clock.c | 1365 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/common.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/common.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/mach-goni.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/mach-smdkv210.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/pm.c | 48 |
8 files changed, 1 insertions, 1446 deletions
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 60785cea7c61..f60f2862856d 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -13,7 +13,6 @@ config CPU_S5PV210 bool select ARM_AMBA select PL330_DMA if DMADEVICES - select S5P_CLOCK if !COMMON_CLK select S5P_EXT_INT select S5P_PM if PM select S5P_SLEEP if PM @@ -71,14 +70,6 @@ config S5PV210_SETUP_USB_PHY help Common setup code for USB PHY controller -config COMMON_CLK_S5PV210 - bool "Common Clock Framework support" - default y - select COMMON_CLK_SAMSUNG - help - Enable this option to use new clock driver - based on Common Clock Framework. - menu "S5PC110 Machines" config MACH_AQUILA diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index d1a493aea1cf..08358bbccb88 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -13,7 +13,6 @@ obj- := # Core obj-y += common.o -obj-$(CONFIG_S5P_CLOCK) += clock.o obj-$(CONFIG_PM) += pm.o obj-y += dma.o diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c deleted file mode 100644 index ca463724a3df..000000000000 --- a/arch/arm/mach-s5pv210/clock.c +++ /dev/null @@ -1,1365 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/clock.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <mach/map.h> - -#include <plat/cpu-freq.h> -#include <mach/regs-clock.h> -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/pll.h> -#include <plat/s5p-clock.h> -#include <plat/clock-clksrc.h> - -#include "common.h" - -static unsigned long xtal; - -static struct clksrc_clk clk_mout_apll = { - .clk = { - .name = "mout_apll", - }, - .sources = &clk_src_apll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, -}; - -static struct clksrc_clk clk_mout_epll = { - .clk = { - .name = "mout_epll", - }, - .sources = &clk_src_epll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 }, -}; - -static struct clksrc_clk clk_mout_mpll = { - .clk = { - .name = "mout_mpll", - }, - .sources = &clk_src_mpll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, -}; - -static struct clk *clkset_armclk_list[] = { - [0] = &clk_mout_apll.clk, - [1] = &clk_mout_mpll.clk, -}; - -static struct clksrc_sources clkset_armclk = { - .sources = clkset_armclk_list, - .nr_sources = ARRAY_SIZE(clkset_armclk_list), -}; - -static struct clksrc_clk clk_armclk = { - .clk = { - .name = "armclk", - }, - .sources = &clkset_armclk, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 }, -}; - -static struct clksrc_clk clk_hclk_msys = { - .clk = { - .name = "hclk_msys", - .parent = &clk_armclk.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 3 }, -}; - -static struct clksrc_clk clk_pclk_msys = { - .clk = { - .name = "pclk_msys", - .parent = &clk_hclk_msys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 3 }, -}; - -static struct clksrc_clk clk_sclk_a2m = { - .clk = { - .name = "sclk_a2m", - .parent = &clk_mout_apll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 }, -}; - -static struct clk *clkset_hclk_sys_list[] = { - [0] = &clk_mout_mpll.clk, - [1] = &clk_sclk_a2m.clk, -}; - -static struct clksrc_sources clkset_hclk_sys = { - .sources = clkset_hclk_sys_list, - .nr_sources = ARRAY_SIZE(clkset_hclk_sys_list), -}; - -static struct clksrc_clk clk_hclk_dsys = { - .clk = { - .name = "hclk_dsys", - }, - .sources = &clkset_hclk_sys, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_dsys = { - .clk = { - .name = "pclk_dsys", - .parent = &clk_hclk_dsys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 }, -}; - -static struct clksrc_clk clk_hclk_psys = { - .clk = { - .name = "hclk_psys", - }, - .sources = &clkset_hclk_sys, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 24, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_psys = { - .clk = { - .name = "pclk_psys", - .parent = &clk_hclk_psys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 }, -}; - -static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable); -} - -static int s5pv210_clk_ip1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP1, clk, enable); -} - -static int s5pv210_clk_ip2_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP2, clk, enable); -} - -static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); -} - -static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); -} - -static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable); -} - -static int s5pv210_clk_hdmiphy_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); -} - -static int exynos4_clk_dac_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_DAC_PHY_CONTROL, clk, enable); -} - -static struct clk clk_sclk_hdmi27m = { - .name = "sclk_hdmi27m", - .rate = 27000000, -}; - -static struct clk clk_sclk_hdmiphy = { - .name = "sclk_hdmiphy", -}; - -static struct clk clk_sclk_usbphy0 = { - .name = "sclk_usbphy0", -}; - -static struct clk clk_sclk_usbphy1 = { - .name = "sclk_usbphy1", -}; - -static struct clk clk_pcmcdclk0 = { - .name = "pcmcdclk", -}; - -static struct clk clk_pcmcdclk1 = { - .name = "pcmcdclk", -}; - -static struct clk clk_pcmcdclk2 = { - .name = "pcmcdclk", -}; - -static struct clk *clkset_vpllsrc_list[] = { - [0] = &clk_fin_vpll, - [1] = &clk_sclk_hdmi27m, -}; - -static struct clksrc_sources clkset_vpllsrc = { - .sources = clkset_vpllsrc_list, - .nr_sources = ARRAY_SIZE(clkset_vpllsrc_list), -}; - -static struct clksrc_clk clk_vpllsrc = { - .clk = { - .name = "vpll_src", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 7), - }, - .sources = &clkset_vpllsrc, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 28, .size = 1 }, -}; - -static struct clk *clkset_sclk_vpll_list[] = { - [0] = &clk_vpllsrc.clk, - [1] = &clk_fout_vpll, -}; - -static struct clksrc_sources clkset_sclk_vpll = { - .sources = clkset_sclk_vpll_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_vpll_list), -}; - -static struct clksrc_clk clk_sclk_vpll = { - .clk = { - .name = "sclk_vpll", - }, - .sources = &clkset_sclk_vpll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 12, .size = 1 }, -}; - -static struct clk *clkset_moutdmc0src_list[] = { - [0] = &clk_sclk_a2m.clk, - [1] = &clk_mout_mpll.clk, - [2] = NULL, - [3] = NULL, -}; - -static struct clksrc_sources clkset_moutdmc0src = { - .sources = clkset_moutdmc0src_list, - .nr_sources = ARRAY_SIZE(clkset_moutdmc0src_list), -}; - -static struct clksrc_clk clk_mout_dmc0 = { - .clk = { - .name = "mout_dmc0", - }, - .sources = &clkset_moutdmc0src, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 }, -}; - -static struct clksrc_clk clk_sclk_dmc0 = { - .clk = { - .name = "sclk_dmc0", - .parent = &clk_mout_dmc0.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 28, .size = 4 }, -}; - -static unsigned long s5pv210_clk_imem_get_rate(struct clk *clk) -{ - return clk_get_rate(clk->parent) / 2; -} - -static struct clk_ops clk_hclk_imem_ops = { - .get_rate = s5pv210_clk_imem_get_rate, -}; - -static unsigned long s5pv210_clk_fout_apll_get_rate(struct clk *clk) -{ - return s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); -} - -static struct clk_ops clk_fout_apll_ops = { - .get_rate = s5pv210_clk_fout_apll_get_rate, -}; - -static struct clk init_clocks_off[] = { - { - .name = "rot", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1<<29), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.0", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 24), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.1", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 25), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.2", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 26), - }, { - .name = "jpeg", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 28), - }, { - .name = "mfc", - .devname = "s5p-mfc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 16), - }, { - .name = "dac", - .devname = "s5p-sdo", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 10), - }, { - .name = "mixer", - .devname = "s5p-mixer", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 9), - }, { - .name = "vp", - .devname = "s5p-mixer", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "hdmi", - .devname = "s5pv210-hdmi", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 11), - }, { - .name = "hdmiphy", - .devname = "s5pv210-hdmi", - .enable = s5pv210_clk_hdmiphy_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "dacphy", - .devname = "s5p-sdo", - .enable = exynos4_clk_dac_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "otg", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<16), - }, { - .name = "usb-host", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<17), - }, { - .name = "lcd", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<0), - }, { - .name = "cfcon", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<25), - }, { - .name = "systimer", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<16), - }, { - .name = "watchdog", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<22), - }, { - .name = "rtc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<15), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<7), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 10), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<9), - }, { - .name = "i2c", - .devname = "s3c2440-hdmiphy-i2c", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 11), - }, { - .name = "spi", - .devname = "s5pv210-spi.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<12), - }, { - .name = "spi", - .devname = "s5pv210-spi.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<13), - }, { - .name = "spi", - .devname = "s5pv210-spi.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<14), - }, { - .name = "timers", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<23), - }, { - .name = "adc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<24), - }, { - .name = "keypad", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<21), - }, { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<4), - }, { - .name = "iis", - .devname = "samsung-i2s.1", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "iis", - .devname = "samsung-i2s.2", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "spdif", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 0), - }, -}; - -static struct clk init_clocks[] = { - { - .name = "hclk_imem", - .parent = &clk_hclk_msys.clk, - .ctrlbit = (1 << 5), - .enable = s5pv210_clk_ip0_ctrl, - .ops = &clk_hclk_imem_ops, - }, { - .name = "uart", - .devname = "s5pv210-uart.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 17), - }, { - .name = "uart", - .devname = "s5pv210-uart.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 18), - }, { - .name = "uart", - .devname = "s5pv210-uart.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 19), - }, { - .name = "uart", - .devname = "s5pv210-uart.3", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 20), - }, { - .name = "sromc", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 26), - }, -}; - -static struct clk clk_hsmmc0 = { - .name = "hsmmc", - .devname = "s3c-sdhci.0", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<16), -}; - -static struct clk clk_hsmmc1 = { - .name = "hsmmc", - .devname = "s3c-sdhci.1", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<17), -}; - -static struct clk clk_hsmmc2 = { - .name = "hsmmc", - .devname = "s3c-sdhci.2", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<18), -}; - -static struct clk clk_hsmmc3 = { - .name = "hsmmc", - .devname = "s3c-sdhci.3", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<19), -}; - -static struct clk clk_pdma0 = { - .name = "pdma0", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 3), -}; - -static struct clk clk_pdma1 = { - .name = "pdma1", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 4), -}; - -static struct clk *clkset_uart_list[] = { - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, -}; - -static struct clksrc_sources clkset_uart = { - .sources = clkset_uart_list, - .nr_sources = ARRAY_SIZE(clkset_uart_list), -}; - -static struct clk *clkset_group1_list[] = { - [0] = &clk_sclk_a2m.clk, - [1] = &clk_mout_mpll.clk, - [2] = &clk_mout_epll.clk, - [3] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_group1 = { - .sources = clkset_group1_list, - .nr_sources = ARRAY_SIZE(clkset_group1_list), -}; - -static struct clk *clkset_sclk_onenand_list[] = { - [0] = &clk_hclk_psys.clk, - [1] = &clk_hclk_dsys.clk, -}; - -static struct clksrc_sources clkset_sclk_onenand = { - .sources = clkset_sclk_onenand_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_onenand_list), -}; - -static struct clk *clkset_sclk_dac_list[] = { - [0] = &clk_sclk_vpll.clk, - [1] = &clk_sclk_hdmiphy, -}; - -static struct clksrc_sources clkset_sclk_dac = { - .sources = clkset_sclk_dac_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_dac_list), -}; - -static struct clksrc_clk clk_sclk_dac = { - .clk = { - .name = "sclk_dac", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 2), - }, - .sources = &clkset_sclk_dac, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 }, -}; - -static struct clksrc_clk clk_sclk_pixel = { - .clk = { - .name = "sclk_pixel", - .parent = &clk_sclk_vpll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4}, -}; - -static struct clk *clkset_sclk_hdmi_list[] = { - [0] = &clk_sclk_pixel.clk, - [1] = &clk_sclk_hdmiphy, -}; - -static struct clksrc_sources clkset_sclk_hdmi = { - .sources = clkset_sclk_hdmi_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_hdmi_list), -}; - -static struct clksrc_clk clk_sclk_hdmi = { - .clk = { - .name = "sclk_hdmi", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 0), - }, - .sources = &clkset_sclk_hdmi, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 }, -}; - -static struct clk *clkset_sclk_mixer_list[] = { - [0] = &clk_sclk_dac.clk, - [1] = &clk_sclk_hdmi.clk, -}; - -static struct clksrc_sources clkset_sclk_mixer = { - .sources = clkset_sclk_mixer_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list), -}; - -static struct clksrc_clk clk_sclk_mixer = { - .clk = { - .name = "sclk_mixer", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 1), - }, - .sources = &clkset_sclk_mixer, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 }, -}; - -static struct clksrc_clk *sclk_tv[] = { - &clk_sclk_dac, - &clk_sclk_pixel, - &clk_sclk_hdmi, - &clk_sclk_mixer, -}; - -static struct clk *clkset_sclk_audio0_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk0, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio0 = { - .sources = clkset_sclk_audio0_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio0_list), -}; - -static struct clksrc_clk clk_sclk_audio0 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 24), - }, - .sources = &clkset_sclk_audio0, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 0, .size = 4 }, -}; - -static struct clk *clkset_sclk_audio1_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk1, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio1 = { - .sources = clkset_sclk_audio1_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio1_list), -}; - -static struct clksrc_clk clk_sclk_audio1 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 25), - }, - .sources = &clkset_sclk_audio1, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 4, .size = 4 }, -}; - -static struct clk *clkset_sclk_audio2_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk0, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio2 = { - .sources = clkset_sclk_audio2_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio2_list), -}; - -static struct clksrc_clk clk_sclk_audio2 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 26), - }, - .sources = &clkset_sclk_audio2, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 8, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 8, .size = 4 }, -}; - -static struct clk *clkset_sclk_spdif_list[] = { - [0] = &clk_sclk_audio0.clk, - [1] = &clk_sclk_audio1.clk, - [2] = &clk_sclk_audio2.clk, -}; - -static struct clksrc_sources clkset_sclk_spdif = { - .sources = clkset_sclk_spdif_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_spdif_list), -}; - -static struct clksrc_clk clk_sclk_spdif = { - .clk = { - .name = "sclk_spdif", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 27), - .ops = &s5p_sclk_spdif_ops, - }, - .sources = &clkset_sclk_spdif, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 12, .size = 2 }, -}; - -static struct clk *clkset_group2_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_xusbxti, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_group2 = { - .sources = clkset_group2_list, - .nr_sources = ARRAY_SIZE(clkset_group2_list), -}; - -static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "sclk_dmc", - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 28, .size = 4 }, - }, { - .clk = { - .name = "sclk_onenand", - }, - .sources = &clkset_sclk_onenand, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 28, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.0", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 2), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.1", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 3), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.2", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 4), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_cam0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 3), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "sclk_cam1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 4), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimd", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 5), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_mfc", - .devname = "s5p-mfc", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 16), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, - }, { - .clk = { - .name = "sclk_g2d", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 12), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, - }, { - .clk = { - .name = "sclk_g3d", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 8), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, - }, { - .clk = { - .name = "sclk_csis", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 6), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 }, - }, { - .clk = { - .name = "sclk_pwi", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 29), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 24, .size = 4 }, - }, { - .clk = { - .name = "sclk_pwm", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 19), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 12, .size = 4 }, - }, -}; - -static struct clksrc_clk clk_sclk_uart0 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 12), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart1 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 13), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart2 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 14), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart3 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.3", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 15), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc0 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 8), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc1 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 9), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc2 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 10), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc3 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.3", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 11), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi0 = { - .clk = { - .name = "sclk_spi", - .devname = "s5pv210-spi.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 16), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 }, - }; - -static struct clksrc_clk clk_sclk_spi1 = { - .clk = { - .name = "sclk_spi", - .devname = "s5pv210-spi.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 17), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 }, - }; - - -static struct clksrc_clk *clksrc_cdev[] = { - &clk_sclk_uart0, - &clk_sclk_uart1, - &clk_sclk_uart2, - &clk_sclk_uart3, - &clk_sclk_mmc0, - &clk_sclk_mmc1, - &clk_sclk_mmc2, - &clk_sclk_mmc3, - &clk_sclk_spi0, - &clk_sclk_spi1, -}; - -static struct clk *clk_cdev[] = { - &clk_hsmmc0, - &clk_hsmmc1, - &clk_hsmmc2, - &clk_hsmmc3, - &clk_pdma0, - &clk_pdma1, -}; - -/* Clock initialisation code */ -static struct clksrc_clk *sysclks[] = { - &clk_mout_apll, - &clk_mout_epll, - &clk_mout_mpll, - &clk_armcl |