summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorSean McLoughlin <smclough@protonmail.com>2021-03-10 21:35:14 -0800
committerDavid Peter <sharkdp@users.noreply.github.com>2021-03-15 07:21:15 +0100
commitd89fa3ebc2639375b0184437607003a639d8ecef (patch)
treefecaf9f14629994c72bee62fb4c7470a4aea7cc0 /src
parentdb57454f3fff5720e80b2783cd827a31dd2c90ae (diff)
Add SystemVerilog support
Diffstat (limited to 'src')
-rw-r--r--src/assets.rs1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/assets.rs b/src/assets.rs
index 19650a27..bac0c430 100644
--- a/src/assets.rs
+++ b/src/assets.rs
@@ -450,6 +450,7 @@ mod tests {
assert_eq!(test.syntax_for_file("test.sass"), "Sass");
assert_eq!(test.syntax_for_file("test.js"), "JavaScript (Babel)");
assert_eq!(test.syntax_for_file("test.fs"), "F#");
+ assert_eq!(test.syntax_for_file("test.v"), "Verilog");
}
#[test]