From 53176beef7cf2f9bb94d31599fe416e0673af2b1 Mon Sep 17 00:00:00 2001
From: CyrIng <labs@cyring.fr>
Date: Sat, 13 Jul 2024 13:21:11 +0200
Subject: [AMD][Zen4][Raphael] Adding the EPYC 4004 Series

---
 x86_64/corefreqk.h | 74 ++++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 72 insertions(+), 2 deletions(-)

diff --git a/x86_64/corefreqk.h b/x86_64/corefreqk.h
index 7a47b5c..eaffb71 100644
--- a/x86_64/corefreqk.h
+++ b/x86_64/corefreqk.h
@@ -3593,7 +3593,8 @@ enum {
 };
 enum {
 	CN_RAPHAEL,
-	CN_DRAGON_RANGE
+	CN_DRAGON_RANGE,
+	CN_EPYC_RAPHAEL
 };
 enum {
 	CN_PHOENIX
@@ -3695,7 +3696,8 @@ static char *Arch_AMD_Zen4_Genoa[] = ZLIST(
 );
 static char *Arch_AMD_Zen4_RPL[] = ZLIST(
 		[CN_RAPHAEL]		=	"Zen4/Raphael",
-		[CN_DRAGON_RANGE]	=	"Zen4/Dragon Range"
+		[CN_DRAGON_RANGE]	=	"Zen4/Dragon Range",
+		[CN_EPYC_RAPHAEL]	=	"Zen4/EPYC/Raphael"
 );
 static char *Arch_AMD_Zen4_PHX[] = ZLIST(
 		[CN_PHOENIX]		=	"Zen4/Phoenix Point"
@@ -8049,6 +8051,74 @@ static PROCESSOR_SPECIFIC AMD_Zen4_RPL_Specific[] = {
 	.HSMP_Capable = 0,
 	.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
 	},
+	{
+	.Brand = ZLIST("AMD EPYC 4464P"),
+	.Boost = {+17, 0},
+	.Param.Offset = {0, 0, 0},
+	.CodeNameIdx = CN_EPYC_RAPHAEL,
+	.TgtRatioUnlocked = 1,
+	.ClkRatioUnlocked = 0b10,
+	.TurboUnlocked = 0,
+	.UncoreUnlocked = 0,
+	.HSMP_Capable = 1,
+	.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
+		|LATCH_HSMP_CAPABLE
+	},
+	{
+	.Brand = ZLIST( "AMD EPYC 4584PX",	\
+			"AMD EPYC 4344P"	),
+	.Boost = {+15, 0},
+	.Param.Offset = {0, 0, 0},
+	.CodeNameIdx = CN_EPYC_RAPHAEL,
+	.TgtRatioUnlocked = 1,
+	.ClkRatioUnlocked = 0b10,
+	.TurboUnlocked = 0,
+	.UncoreUnlocked = 0,
+	.HSMP_Capable = 1,
+	.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
+		|LATCH_HSMP_CAPABLE
+	},
+	{
+	.Brand = ZLIST( "AMD EPYC 4244P",	\
+			"AMD EPYC 4124P"	),
+	.Boost = {+13, 0},
+	.Param.Offset = {0, 0, 0},
+	.CodeNameIdx = CN_EPYC_RAPHAEL,
+	.TgtRatioUnlocked = 1,
+	.ClkRatioUnlocked = 0b10,
+	.TurboUnlocked = 0,
+	.UncoreUnlocked = 0,
+	.HSMP_Capable = 1,
+	.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
+		|LATCH_HSMP_CAPABLE
+	},
+	{
+	.Brand = ZLIST( "AMD EPYC 4564P",	\
+			"AMD EPYC 4484PX"	),
+	.Boost = {+12, 0},
+	.Param.Offset = {0, 0, 0},
+	.CodeNameIdx = CN_EPYC_RAPHAEL,
+	.TgtRatioUnlocked = 1,
+	.ClkRatioUnlocked = 0b10,
+	.TurboUnlocked = 0,
+	.UncoreUnlocked = 0,
+	.HSMP_Capable = 1,
+	.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
+		|LATCH_HSMP_CAPABLE
+	},
+	{
+	.Brand = ZLIST("AMD EPYC 4364P"),
+	.Boost = {+9, 0},
+	.Param.Offset = {0, 0, 0},
+	.CodeNameIdx = CN_EPYC_RAPHAEL,
+	.TgtRatioUnlocked = 1,
+	.ClkRatioUnlocked = 0b10,
+	.TurboUnlocked = 0,
+	.UncoreUnlocked = 0,
+	.HSMP_Capable = 1,
+	.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
+		|LATCH_HSMP_CAPABLE
+	},
 	{0}
 };
 static PROCESSOR_SPECIFIC AMD_Zen4_PHX_Specific[] = {
-- 
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